MeterLogger
spi.c
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1 /*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2015 David Ogilvy (MetalPhreak)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 
25 
26 #include "driver/spi.h"
27 
28 
29 ////////////////////////////////////////////////////////////////////////////////
30 //
31 // Function Name: spi_init
32 // Description: Wrapper to setup HSPI/SPI GPIO pins and default SPI clock
33 // Parameters: spi_no - SPI (0) or HSPI (1)
34 //
35 ////////////////////////////////////////////////////////////////////////////////
36 
38 void spi_init(uint8 spi_no){
39 
40  if(spi_no > 1) return; //Only SPI and HSPI are valid spi modules.
41 
46 
49 
50 }
51 
52 ////////////////////////////////////////////////////////////////////////////////
53 
54 ////////////////////////////////////////////////////////////////////////////////
55 //
56 // Function Name: spi_mode
57 // Description: Configures SPI mode parameters for clock edge and clock polarity.
58 // Parameters: spi_no - SPI (0) or HSPI (1)
59 // spi_cpha - (0) Data is valid on clock leading edge
60 // (1) Data is valid on clock trailing edge
61 // spi_cpol - (0) Clock is low when inactive
62 // (1) Clock is high when inactive
63 //
64 ////////////////////////////////////////////////////////////////////////////////
65 
67 void spi_mode(uint8 spi_no, uint8 spi_cpha,uint8 spi_cpol){
68  if(spi_cpha) {
70  } else {
72  }
73 
74  if (spi_cpol) {
76  } else {
78  }
79 }
80 
81 
82 ////////////////////////////////////////////////////////////////////////////////
83 
84 ////////////////////////////////////////////////////////////////////////////////
85 //
86 // Function Name: spi_init_gpio
87 // Description: Initialises the GPIO pins for use as SPI pins.
88 // Parameters: spi_no - SPI (0) or HSPI (1)
89 // sysclk_as_spiclk - SPI_CLK_80MHZ_NODIV (1) if using 80MHz
90 // sysclock for SPI clock.
91 // SPI_CLK_USE_DIV (0) if using divider to
92 // get lower SPI clock speed.
93 //
94 ////////////////////////////////////////////////////////////////////////////////
95 
97 void spi_init_gpio(uint8 spi_no, uint8 sysclk_as_spiclk){
98 
99 // if(spi_no > 1) return; //Not required. Valid spi_no is checked with if/elif below.
100 
101  uint32 clock_div_flag = 0;
102  if(sysclk_as_spiclk){
103  clock_div_flag = 0x0001;
104  }
105 
106  if(spi_no==SPI){
107  WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005|(clock_div_flag<<8)); //Set bit 8 if 80MHz sysclock required
112  }else if(spi_no==HSPI){
113  WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105|(clock_div_flag<<9)); //Set bit 9 if 80MHz sysclock required
114  PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); //GPIO12 is HSPI MISO pin (Master Data In)
115  PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); //GPIO13 is HSPI MOSI pin (Master Data Out)
116  PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); //GPIO14 is HSPI CLK pin (Clock)
117  PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); //GPIO15 is HSPI CS pin (Chip Select / Slave Select)
118  }
119 
120 }
121 
122 ////////////////////////////////////////////////////////////////////////////////
123 
124 ////////////////////////////////////////////////////////////////////////////////
125 //
126 // Function Name: spi_clock
127 // Description: sets up the control registers for the SPI clock
128 // Parameters: spi_no - SPI (0) or HSPI (1)
129 // prediv - predivider value (actual division value)
130 // cntdiv - postdivider value (actual division value)
131 // Set either divider to 0 to disable all division (80MHz sysclock)
132 //
133 ////////////////////////////////////////////////////////////////////////////////
134 
136 void spi_clock(uint8 spi_no, uint16 prediv, uint8 cntdiv){
137 
138  if(spi_no > 1) return;
139 
140  if((prediv==0)|(cntdiv==0)){
141 
143 
144  } else {
145 
146  WRITE_PERI_REG(SPI_CLOCK(spi_no),
147  (((prediv-1)&SPI_CLKDIV_PRE)<<SPI_CLKDIV_PRE_S)|
148  (((cntdiv-1)&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)|
149  (((cntdiv>>1)&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
151  }
152 
153 }
154 
155 ////////////////////////////////////////////////////////////////////////////////
156 
157 ////////////////////////////////////////////////////////////////////////////////
158 //
159 // Function Name: spi_tx_byte_order
160 // Description: Setup the byte order for shifting data out of buffer
161 // Parameters: spi_no - SPI (0) or HSPI (1)
162 // byte_order - SPI_BYTE_ORDER_HIGH_TO_LOW (1)
163 // Data is sent out starting with Bit31 and down to Bit0
164 //
165 // SPI_BYTE_ORDER_LOW_TO_HIGH (0)
166 // Data is sent out starting with the lowest BYTE, from
167 // MSB to LSB, followed by the second lowest BYTE, from
168 // MSB to LSB, followed by the second highest BYTE, from
169 // MSB to LSB, followed by the highest BYTE, from MSB to LSB
170 // 0xABCDEFGH would be sent as 0xGHEFCDAB
171 //
172 //
173 ////////////////////////////////////////////////////////////////////////////////
174 
176 void spi_tx_byte_order(uint8 spi_no, uint8 byte_order){
177 
178  if(spi_no > 1) return;
179 
180  if(byte_order){
182  } else {
184  }
185 }
186 ////////////////////////////////////////////////////////////////////////////////
187 
188 ////////////////////////////////////////////////////////////////////////////////
189 //
190 // Function Name: spi_rx_byte_order
191 // Description: Setup the byte order for shifting data into buffer
192 // Parameters: spi_no - SPI (0) or HSPI (1)
193 // byte_order - SPI_BYTE_ORDER_HIGH_TO_LOW (1)
194 // Data is read in starting with Bit31 and down to Bit0
195 //
196 // SPI_BYTE_ORDER_LOW_TO_HIGH (0)
197 // Data is read in starting with the lowest BYTE, from
198 // MSB to LSB, followed by the second lowest BYTE, from
199 // MSB to LSB, followed by the second highest BYTE, from
200 // MSB to LSB, followed by the highest BYTE, from MSB to LSB
201 // 0xABCDEFGH would be read as 0xGHEFCDAB
202 //
203 //
204 ////////////////////////////////////////////////////////////////////////////////
205 
207 void spi_rx_byte_order(uint8 spi_no, uint8 byte_order){
208 
209  if(spi_no > 1) return;
210 
211  if(byte_order){
213  } else {
215  }
216 }
217 ////////////////////////////////////////////////////////////////////////////////
218 
219 ////////////////////////////////////////////////////////////////////////////////
220 //
221 // Function Name: spi_transaction
222 // Description: SPI transaction function
223 // Parameters: spi_no - SPI (0) or HSPI (1)
224 // cmd_bits - actual number of bits to transmit
225 // cmd_data - command data
226 // addr_bits - actual number of bits to transmit
227 // addr_data - address data
228 // dout_bits - actual number of bits to transmit
229 // dout_data - output data
230 // din_bits - actual number of bits to receive
231 //
232 // Returns: read data - uint32 containing read in data only if RX was set
233 // 0 - something went wrong (or actual read data was 0)
234 // 1 - data sent ok (or actual read data is 1)
235 // Note: all data is assumed to be stored in the lower bits of
236 // the data variables (for anything <32 bits).
237 //
238 ////////////////////////////////////////////////////////////////////////////////
239 
241 uint32 spi_transaction(uint8 spi_no, uint8 cmd_bits, uint16 cmd_data, uint32 addr_bits, uint32 addr_data, uint32 dout_bits, uint32 dout_data,
242  uint32 din_bits, uint32 dummy_bits){
243 
244  if(spi_no > 1) return 0; //Check for a valid SPI
245 
246  //code for custom Chip Select as GPIO PIN here
247 
248  while(spi_busy(spi_no)); //wait for SPI to be ready
249 
250 //########## Enable SPI Functions ##########//
251  //disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set.
253 
254  //enable functions based on number of bits. 0 bits = disabled.
255  //This is rather inefficient but allows for a very generic function.
256  //CMD ADDR and MOSI are set below to save on an extra if statement.
257 // if(cmd_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND);}
258 // if(addr_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR);}
259  if(din_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO);}
260  if(dummy_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY);}
261 //########## END SECTION ##########//
262 
263 //########## Setup Bitlengths ##########//
264  WRITE_PERI_REG(SPI_USER1(spi_no), ((addr_bits-1)&SPI_USR_ADDR_BITLEN)<<SPI_USR_ADDR_BITLEN_S | //Number of bits in Address
265  ((dout_bits-1)&SPI_USR_MOSI_BITLEN)<<SPI_USR_MOSI_BITLEN_S | //Number of bits to Send
266  ((din_bits-1)&SPI_USR_MISO_BITLEN)<<SPI_USR_MISO_BITLEN_S | //Number of bits to receive
267  ((dummy_bits-1)&SPI_USR_DUMMY_CYCLELEN)<<SPI_USR_DUMMY_CYCLELEN_S); //Number of Dummy bits to insert
268 //########## END SECTION ##########//
269 
270 //########## Setup Command Data ##########//
271  if(cmd_bits) {
272  SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND); //enable COMMAND function in SPI module
273  uint16 command = cmd_data << (16-cmd_bits); //align command data to high bits
274  command = ((command>>8)&0xff) | ((command<<8)&0xff00); //swap byte order
276  }
277 //########## END SECTION ##########//
278 
279 //########## Setup Address Data ##########//
280  if(addr_bits){
281  SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR); //enable ADDRess function in SPI module
282  WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data<<(32-addr_bits)); //align address data to high bits
283  }
284 
285 
286 //########## END SECTION ##########//
287 
288 //########## Setup DOUT data ##########//
289  if(dout_bits) {
290  SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); //enable MOSI function in SPI module
291  //copy data to W0
293  WRITE_PERI_REG(SPI_W0(spi_no), dout_data<<(32-dout_bits));
294  } else {
295 
296  uint8 dout_extra_bits = dout_bits%8;
297 
298  if(dout_extra_bits){
299  //if your data isn't a byte multiple (8/16/24/32 bits)and you don't have SPI_WR_BYTE_ORDER set, you need this to move the non-8bit remainder to the MSBs
300  //not sure if there's even a use case for this, but it's here if you need it...
301  //for example, 0xDA4 12 bits without SPI_WR_BYTE_ORDER would usually be output as if it were 0x0DA4,
302  //of which 0xA4, and then 0x0 would be shifted out (first 8 bits of low byte, then 4 MSB bits of high byte - ie reverse byte order).
303  //The code below shifts it out as 0xA4 followed by 0xD as you might require.
304  WRITE_PERI_REG(SPI_W0(spi_no), ((0xFFFFFFFF<<(dout_bits - dout_extra_bits)&dout_data)<<(8-dout_extra_bits) | (0xFFFFFFFF>>(32-(dout_bits - dout_extra_bits)))&dout_data));
305  } else {
306  WRITE_PERI_REG(SPI_W0(spi_no), dout_data);
307  }
308  }
309  }
310 //########## END SECTION ##########//
311 
312 //########## Begin SPI Transaction ##########//
314 //########## END SECTION ##########//
315 
316 //########## Return DIN data ##########//
317  if(din_bits) {
318  while(spi_busy(spi_no)); //wait for SPI transaction to complete
319 
321  return READ_PERI_REG(SPI_W0(spi_no)) >> (32-din_bits); //Assuming data in is written to MSB. TBC
322  } else {
323  return READ_PERI_REG(SPI_W0(spi_no)); //Read in the same way as DOUT is sent. Note existing contents of SPI_W0 remain unless overwritten!
324  }
325 
326  return 0; //something went wrong
327  }
328 //########## END SECTION ##########//
329 
330  //Transaction completed
331  return 1; //success
332 }
333 
334 ////////////////////////////////////////////////////////////////////////////////
335 
336 /*///////////////////////////////////////////////////////////////////////////////
337 //
338 // Function Name: func
339 // Description:
340 // Parameters:
341 //
342 ////////////////////////////////////////////////////////////////////////////////
343 
344 void func(params){
345 
346 }
347 
348 ///////////////////////////////////////////////////////////////////////////////*/
349 
350 
#define SPI_CLK_PREDIV
Definition: spi.h:49
#define PIN_FUNC_SELECT(PIN_NAME, FUNC)
Definition: eagle_soc.h:270
#define SPI
Definition: spi.h:35
ICACHE_FLASH_ATTR uint32 spi_transaction(uint8 spi_no, uint8 cmd_bits, uint16 cmd_data, uint32 addr_bits, uint32 addr_data, uint32 dout_bits, uint32 dout_data, uint32 din_bits, uint32 dummy_bits)
Definition: spi.c:241
#define SPI_IDLE_EDGE
Definition: spi_register.h:164
#define SPI_USR_COMMAND_VALUE
Definition: spi_register.h:157
#define SPI_USER(i)
Definition: spi_register.h:107
#define SPI_CLKDIV_PRE_S
Definition: spi_register.h:99
#define SPI_FLASH_MODE
Definition: spi_register.h:137
#define SPI_CLKCNT_L
Definition: spi_register.h:104
#define READ_PERI_REG(addr)
Definition: eagle_soc.h:68
#define SPI_USR_MOSI
Definition: spi_register.h:112
#define PERIPHS_IO_MUX
Definition: eagle_soc.h:87
#define SPI_USR_ADDR
Definition: spi_register.h:109
ICACHE_FLASH_ATTR void spi_init_gpio(uint8 spi_no, uint8 sysclk_as_spiclk)
Definition: spi.c:97
#define SPI_USR_MISO_BITLEN_S
Definition: spi_register.h:150
#define SPI_USR_MISO
Definition: spi_register.h:111
ICACHE_FLASH_ATTR void spi_tx_byte_order(uint8 spi_no, uint8 byte_order)
Definition: spi.c:176
unsigned short uint16
Definition: c_types.h:50
#define ICACHE_FLASH_ATTR
Definition: c_types.h:99
#define SPI_CLKCNT_N_S
Definition: spi_register.h:101
#define SPI_CLK_EQU_SYSCLK
Definition: spi_register.h:97
#define PERIPHS_IO_MUX_MTDI_U
Definition: eagle_soc.h:219
#define SPI_USR_ADDR_BITLEN_S
Definition: spi_register.h:146
ICACHE_FLASH_ATTR void spi_init(uint8 spi_no)
Definition: spi.c:38
#define SPI_USR_MOSI_BITLEN_S
Definition: spi_register.h:148
#define PERIPHS_IO_MUX_MTCK_U
Definition: eagle_soc.h:221
#define HSPI
Definition: spi.h:36
#define SPI_WR_BYTE_ORDER
Definition: spi_register.h:128
#define SPI_W0(i)
Definition: spi_register.h:236
#define PERIPHS_IO_MUX_SD_DATA0_U
Definition: eagle_soc.h:236
#define WRITE_PERI_REG(addr, val)
Definition: eagle_soc.h:69
#define SPI_CS_SETUP
Definition: spi_register.h:134
#define SPI_USR_DUMMY
Definition: spi_register.h:110
#define CLEAR_PERI_REG_MASK(reg, mask)
Definition: eagle_soc.h:70
#define SPI_PIN(i)
Definition: spi_register.h:163
#define SPI_CK_OUT_EDGE
Definition: spi_register.h:132
ICACHE_FLASH_ATTR void spi_mode(uint8 spi_no, uint8 spi_cpha, uint8 spi_cpol)
Definition: spi.c:67
#define SPI_USR_MISO_BITLEN
Definition: spi_register.h:149
#define SPI_CLK_USE_DIV
Definition: spi.h:38
#define PERIPHS_IO_MUX_SD_CLK_U
Definition: eagle_soc.h:233
unsigned char uint8
Definition: c_types.h:45
#define SPI_USR_COMMAND_BITLEN_S
Definition: spi_register.h:156
#define SPI_CLKCNT_N
Definition: spi_register.h:100
#define SPI_CLKCNT_H_S
Definition: spi_register.h:103
ICACHE_FLASH_ATTR void spi_clock(uint8 spi_no, uint16 prediv, uint8 cntdiv)
Definition: spi.c:136
#define PERIPHS_IO_MUX_MTDO_U
Definition: eagle_soc.h:225
#define SPI_CS_HOLD
Definition: spi_register.h:135
#define SPI_USR_COMMAND
Definition: spi_register.h:108
#define SPI_USER2(i)
Definition: spi_register.h:154
#define SPI_CLK_CNTDIV
Definition: spi.h:50
unsigned int uint32
Definition: c_types.h:54
#define SPI_ADDR(i)
Definition: spi_register.h:32
#define SPI_USR_MOSI_BITLEN
Definition: spi_register.h:147
#define SPI_BYTE_ORDER_HIGH_TO_LOW
Definition: spi.h:41
#define SPI_RD_BYTE_ORDER
Definition: spi_register.h:129
#define PERIPHS_IO_MUX_SD_DATA1_U
Definition: eagle_soc.h:240
#define SPI_CLOCK(i)
Definition: spi_register.h:96
#define SPI_CMD(i)
Definition: spi_register.h:16
#define SPI_USR_ADDR_BITLEN
Definition: spi_register.h:145
#define SPI_USR_DUMMY_CYCLELEN_S
Definition: spi_register.h:152
#define SPI_CLKDIV_PRE
Definition: spi_register.h:98
#define SPI_CLKCNT_H
Definition: spi_register.h:102
#define SPI_USR
Definition: spi_register.h:30
#define SET_PERI_REG_MASK(reg, mask)
Definition: eagle_soc.h:71
#define SPI_USER1(i)
Definition: spi_register.h:144
ICACHE_FLASH_ATTR void spi_rx_byte_order(uint8 spi_no, uint8 byte_order)
Definition: spi.c:207
#define SPI_CLKCNT_L_S
Definition: spi_register.h:105
#define PERIPHS_IO_MUX_MTMS_U
Definition: eagle_soc.h:223
#define PERIPHS_IO_MUX_SD_CMD_U
Definition: eagle_soc.h:253
#define SPI_USR_COMMAND_BITLEN
Definition: spi_register.h:155
#define spi_busy(spi_no)
Definition: spi.h:66
#define SPI_USR_DUMMY_CYCLELEN
Definition: spi_register.h:151