This graph shows which files directly or indirectly include this file:

Macros
#define	BIT31 0x80000000

#define	BIT30 0x40000000

#define	BIT29 0x20000000

#define	BIT28 0x10000000

#define	BIT27 0x08000000

#define	BIT26 0x04000000

#define	BIT25 0x02000000

#define	BIT24 0x01000000

#define	BIT23 0x00800000

#define	BIT22 0x00400000

#define	BIT21 0x00200000

#define	BIT20 0x00100000

#define	BIT19 0x00080000

#define	BIT18 0x00040000

#define	BIT17 0x00020000

#define	BIT16 0x00010000

#define	BIT15 0x00008000

#define	BIT14 0x00004000

#define	BIT13 0x00002000

#define	BIT12 0x00001000

#define	BIT11 0x00000800

#define	BIT10 0x00000400

#define	BIT9 0x00000200

#define	BIT8 0x00000100

#define	BIT7 0x00000080

#define	BIT6 0x00000040

#define	BIT5 0x00000020

#define	BIT4 0x00000010

#define	BIT3 0x00000008

#define	BIT2 0x00000004

#define	BIT1 0x00000002

#define	BIT0 0x00000001

#define	ETS_UNCACHED_ADDR(addr) (addr)

#define	ETS_CACHED_ADDR(addr) (addr)

#define	READ_PERI_REG(addr) (((volatile uint32_t )ETS_UNCACHED_ADDR(addr)))

#define	WRITE_PERI_REG(addr, val) (((volatile uint32_t )ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)

#define	CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))

#define	SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)\|(mask)))

#define	GET_PERI_REG_BITS(reg, hipos, lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))

#define	SET_PERI_REG_BITS(reg, bit_map, value, shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))\|((value)<<(shift)) ))

#define	APB_CLK_FREQ 80*1000000

#define	UART_CLK_FREQ APB_CLK_FREQ

#define	TIMER_CLK_FREQ (APB_CLK_FREQ>>8)

#define	PERIPHS_DPORT_BASEADDR 0x3ff00000

#define	PERIPHS_GPIO_BASEADDR 0x60000300

#define	PERIPHS_TIMER_BASEDDR 0x60000600

#define	PERIPHS_RTC_BASEADDR 0x60000700

#define	PERIPHS_IO_MUX 0x60000800

#define	EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04)

#define	TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)

#define	TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)

#define	GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + reg)

#define	GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + reg, val)

#define	GPIO_OUT_ADDRESS 0x00

#define	GPIO_OUT_W1TS_ADDRESS 0x04

#define	GPIO_OUT_W1TC_ADDRESS 0x08

#define	GPIO_ENABLE_ADDRESS 0x0c

#define	GPIO_ENABLE_W1TS_ADDRESS 0x10

#define	GPIO_ENABLE_W1TC_ADDRESS 0x14

#define	GPIO_OUT_W1TC_DATA_MASK 0x0000ffff

#define	GPIO_IN_ADDRESS 0x18

#define	GPIO_STATUS_ADDRESS 0x1c

#define	GPIO_STATUS_W1TS_ADDRESS 0x20

#define	GPIO_STATUS_W1TC_ADDRESS 0x24

#define	GPIO_STATUS_INTERRUPT_MASK 0x0000ffff

#define	GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c

#define	RTC_CALIB_START BIT31

#define	RTC_PERIOD_NUM_MASK 0x3ff

#define	GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70

#define	RTC_CALIB_RDY_S 31

#define	RTC_CALIB_VALUE_MASK 0xfffff

#define	GPIO_PIN0_ADDRESS 0x28

#define	GPIO_ID_PIN0 0

#define	GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))

#define	GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)

#define	GPIO_ID_NONE 0xffffffff

#define	GPIO_PIN_COUNT 16

#define	GPIO_PIN_CONFIG_MSB 12

#define	GPIO_PIN_CONFIG_LSB 11

#define	GPIO_PIN_CONFIG_MASK 0x00001800

#define	GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)

#define	GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)

#define	GPIO_WAKEUP_ENABLE 1

#define	GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE)

#define	GPIO_PIN_WAKEUP_ENABLE_MSB 10

#define	GPIO_PIN_WAKEUP_ENABLE_LSB 10

#define	GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400

#define	GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)

#define	GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)

#define	GPIO_PIN_INT_TYPE_MASK 0x380

#define	GPIO_PIN_INT_TYPE_MSB 9

#define	GPIO_PIN_INT_TYPE_LSB 7

#define	GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)

#define	GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)

#define	GPIO_PAD_DRIVER_ENABLE 1

#define	GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE)

#define	GPIO_PIN_PAD_DRIVER_MSB 2

#define	GPIO_PIN_PAD_DRIVER_LSB 2

#define	GPIO_PIN_PAD_DRIVER_MASK 0x00000004

#define	GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)

#define	GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)

#define	GPIO_AS_PIN_SOURCE 0

#define	SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)

#define	GPIO_PIN_SOURCE_MSB 0

#define	GPIO_PIN_SOURCE_LSB 0

#define	GPIO_PIN_SOURCE_MASK 0x00000001

#define	GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB)

#define	GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK)

#define	RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)

#define	RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)

#define	RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)

#define	NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS)

#define	FRC1_LOAD_ADDRESS 0x00

#define	FRC1_COUNT_ADDRESS 0x04

#define	FRC1_CTRL_ADDRESS 0x08

#define	FRC1_INT_ADDRESS 0x0c

#define	FRC1_INT_CLR_MASK 0x00000001

#define	FRC2_COUNT_ADDRESS 0x24

#define	REG_RTC_BASE PERIPHS_RTC_BASEADDR

#define	RTC_STORE0 (REG_RTC_BASE + 0x030)

#define	RTC_STORE1 (REG_RTC_BASE + 0x034)

#define	RTC_STORE2 (REG_RTC_BASE + 0x038)

#define	RTC_STORE3 (REG_RTC_BASE + 0x03C)

#define	RTC_GPIO_OUT (REG_RTC_BASE + 0x068)

#define	RTC_GPIO_ENABLE (REG_RTC_BASE + 0x074)

#define	RTC_GPIO_IN_DATA (REG_RTC_BASE + 0x08C)

#define	RTC_GPIO_CONF (REG_RTC_BASE + 0x090)

#define	PAD_XPD_DCDC_CONF (REG_RTC_BASE + 0x0A0)

#define	PERIPHS_IO_MUX_FUNC 0x13

#define	PERIPHS_IO_MUX_FUNC_S 4

#define	PERIPHS_IO_MUX_PULLUP BIT7

#define	PERIPHS_IO_MUX_PULLUP2 BIT6

#define	PERIPHS_IO_MUX_SLEEP_PULLUP BIT3

#define	PERIPHS_IO_MUX_SLEEP_PULLUP2 BIT2

#define	PERIPHS_IO_MUX_SLEEP_OE BIT1

#define	PERIPHS_IO_MUX_OE BIT0

#define	PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00)

#define	SPI0_CLK_EQU_SYS_CLK BIT8

#define	SPI1_CLK_EQU_SYS_CLK BIT9

#define	PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04)

#define	FUNC_GPIO12 3

#define	PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08)

#define	FUNC_GPIO13 3

#define	PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C)

#define	FUNC_GPIO14 3

#define	PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10)

#define	FUNC_GPIO15 3

#define	FUNC_U0RTS 4

#define	PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14)

#define	FUNC_GPIO3 3

#define	PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18)

#define	FUNC_U0TXD 0

#define	FUNC_GPIO1 3

#define	PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c)

#define	FUNC_SDCLK 0

#define	FUNC_SPICLK 1

#define	PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20)

#define	FUNC_SDDATA0 0

#define	FUNC_SPIQ 1

#define	FUNC_U1TXD 4

#define	PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24)

#define	FUNC_SDDATA1 0

#define	FUNC_SPID 1

#define	FUNC_U1RXD 4

#define	FUNC_SDDATA1_U1RXD 7

#define	PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28)

#define	FUNC_SDDATA2 0

#define	FUNC_SPIHD 1

#define	FUNC_GPIO9 3

#define	PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c)

#define	FUNC_SDDATA3 0

#define	FUNC_SPIWP 1

#define	FUNC_GPIO10 3

#define	PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30)

#define	FUNC_SDCMD 0

#define	FUNC_SPICS0 1

#define	PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34)

#define	FUNC_GPIO0 0

#define	PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38)

#define	FUNC_GPIO2 0

#define	FUNC_U1TXD_BK 2

#define	FUNC_U0TXD_BK 4

#define	PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C)

#define	FUNC_GPIO4 0

#define	PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40)

#define	FUNC_GPIO5 0

#define	PIN_PULLUP_DIS(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)

#define	PIN_PULLUP_EN(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)

#define	PIN_FUNC_SELECT(PIN_NAME, FUNC)

Macro Definition Documentation

◆ APB_CLK_FREQ

#define APB_CLK_FREQ 80*1000000

Definition at line 77 of file eagle_soc.h.

◆ BIT0

#define BIT0 0x00000001

Definition at line 60 of file eagle_soc.h.

◆ BIT1

#define BIT1 0x00000002

Definition at line 59 of file eagle_soc.h.

◆ BIT10

#define BIT10 0x00000400

Definition at line 50 of file eagle_soc.h.

◆ BIT11

#define BIT11 0x00000800

Definition at line 49 of file eagle_soc.h.

◆ BIT12

#define BIT12 0x00001000

Definition at line 48 of file eagle_soc.h.

◆ BIT13

#define BIT13 0x00002000

Definition at line 47 of file eagle_soc.h.

◆ BIT14

#define BIT14 0x00004000

Definition at line 46 of file eagle_soc.h.

Referenced by ac_motor_valve_open(), ac_out_off_timer_func(), ac_pwm_timer_func(), ac_test(), ac_test_timer_func(), ac_thermo_close(), and ac_thermo_open().

◆ BIT15

#define BIT15 0x00008000

Definition at line 45 of file eagle_soc.h.

Referenced by ac_out_off_timer_func(), ac_test(), ac_thermo_close(), and ac_thermo_open().

◆ BIT16

#define BIT16 0x00010000

Definition at line 44 of file eagle_soc.h.

◆ BIT17

#define BIT17 0x00020000

Definition at line 43 of file eagle_soc.h.

◆ BIT18

#define BIT18 0x00040000

Definition at line 42 of file eagle_soc.h.

◆ BIT19

#define BIT19 0x00080000

Definition at line 41 of file eagle_soc.h.

◆ BIT2

#define BIT2 0x00000004

Definition at line 58 of file eagle_soc.h.

Referenced by led_blinker_timer_func(), led_init(), led_off(), and led_on().

◆ BIT20

#define BIT20 0x00100000

Definition at line 40 of file eagle_soc.h.

◆ BIT21

#define BIT21 0x00200000

Definition at line 39 of file eagle_soc.h.

◆ BIT22

#define BIT22 0x00400000

Definition at line 38 of file eagle_soc.h.

◆ BIT23

#define BIT23 0x00800000

Definition at line 37 of file eagle_soc.h.

◆ BIT24

#define BIT24 0x01000000

Definition at line 36 of file eagle_soc.h.

◆ BIT25

#define BIT25 0x02000000

Definition at line 35 of file eagle_soc.h.

◆ BIT26

#define BIT26 0x04000000

Definition at line 34 of file eagle_soc.h.

◆ BIT27

#define BIT27 0x08000000

Definition at line 33 of file eagle_soc.h.

◆ BIT28

#define BIT28 0x10000000

Definition at line 32 of file eagle_soc.h.

◆ BIT29

#define BIT29 0x20000000

Definition at line 31 of file eagle_soc.h.

◆ BIT3

#define BIT3 0x00000008

Definition at line 57 of file eagle_soc.h.

◆ BIT30

#define BIT30 0x40000000

Definition at line 30 of file eagle_soc.h.

◆ BIT31

#define BIT31 0x80000000

Definition at line 29 of file eagle_soc.h.

◆ BIT4

#define BIT4 0x00000010

Definition at line 56 of file eagle_soc.h.

◆ BIT5

#define BIT5 0x00000020

Definition at line 55 of file eagle_soc.h.

◆ BIT6

#define BIT6 0x00000040

Definition at line 54 of file eagle_soc.h.

◆ BIT7

#define BIT7 0x00000080

Definition at line 53 of file eagle_soc.h.

◆ BIT8

#define BIT8 0x00000100

Definition at line 52 of file eagle_soc.h.

◆ BIT9

#define BIT9 0x00000200

Definition at line 51 of file eagle_soc.h.

◆ CLEAR_PERI_REG_MASK

#define CLEAR_PERI_REG_MASK	(	reg,
		mask
	)	WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))

Definition at line 70 of file eagle_soc.h.

Referenced by ext_spi_init(), spi_init(), spi_mode(), spi_rx_byte_order(), spi_transaction(), spi_tx_byte_order(), uart_config(), uart_set_line_inverse(), and uart_set_parity().

◆ EDGE_INT_ENABLE_REG

#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04)

Definition at line 91 of file eagle_soc.h.

◆ ETS_CACHED_ADDR

#define ETS_CACHED_ADDR ( addr ) (addr)

Definition at line 65 of file eagle_soc.h.

◆ ETS_UNCACHED_ADDR

#define ETS_UNCACHED_ADDR ( addr ) (addr)

Definition at line 64 of file eagle_soc.h.

◆ FRC1_COUNT_ADDRESS

#define FRC1_COUNT_ADDRESS 0x04

Definition at line 179 of file eagle_soc.h.

◆ FRC1_CTRL_ADDRESS

#define FRC1_CTRL_ADDRESS 0x08

Definition at line 181 of file eagle_soc.h.

◆ FRC1_INT_ADDRESS

#define FRC1_INT_ADDRESS 0x0c

Definition at line 184 of file eagle_soc.h.

◆ FRC1_INT_CLR_MASK

#define FRC1_INT_CLR_MASK 0x00000001

Definition at line 185 of file eagle_soc.h.

◆ FRC1_LOAD_ADDRESS

#define FRC1_LOAD_ADDRESS 0x00

Definition at line 176 of file eagle_soc.h.

◆ FRC2_COUNT_ADDRESS

#define FRC2_COUNT_ADDRESS 0x24

Definition at line 188 of file eagle_soc.h.

◆ FUNC_GPIO0

#define FUNC_GPIO0 0

Definition at line 257 of file eagle_soc.h.

◆ FUNC_GPIO1

#define FUNC_GPIO1 3

Definition at line 232 of file eagle_soc.h.

◆ FUNC_GPIO10

#define FUNC_GPIO10 3

Definition at line 252 of file eagle_soc.h.

◆ FUNC_GPIO12

#define FUNC_GPIO12 3

Definition at line 220 of file eagle_soc.h.

◆ FUNC_GPIO13

#define FUNC_GPIO13 3

Definition at line 222 of file eagle_soc.h.

◆ FUNC_GPIO14

#define FUNC_GPIO14 3

Definition at line 224 of file eagle_soc.h.

Referenced by ac_out_init().

◆ FUNC_GPIO15

#define FUNC_GPIO15 3

Definition at line 226 of file eagle_soc.h.

Referenced by ac_out_init().

◆ FUNC_GPIO2

#define FUNC_GPIO2 0

Definition at line 259 of file eagle_soc.h.

Referenced by led_init().

◆ FUNC_GPIO3

#define FUNC_GPIO3 3

Definition at line 229 of file eagle_soc.h.

◆ FUNC_GPIO4

#define FUNC_GPIO4 0

Definition at line 263 of file eagle_soc.h.

◆ FUNC_GPIO5

#define FUNC_GPIO5 0

Definition at line 265 of file eagle_soc.h.

◆ FUNC_GPIO9

#define FUNC_GPIO9 3

Definition at line 248 of file eagle_soc.h.

◆ FUNC_SDCLK

#define FUNC_SDCLK 0

Definition at line 234 of file eagle_soc.h.

◆ FUNC_SDCMD

#define FUNC_SDCMD 0

Definition at line 254 of file eagle_soc.h.

◆ FUNC_SDDATA0

#define FUNC_SDDATA0 0

Definition at line 237 of file eagle_soc.h.

◆ FUNC_SDDATA1

#define FUNC_SDDATA1 0

Definition at line 241 of file eagle_soc.h.

◆ FUNC_SDDATA1_U1RXD

#define FUNC_SDDATA1_U1RXD 7

Definition at line 244 of file eagle_soc.h.

◆ FUNC_SDDATA2

#define FUNC_SDDATA2 0

Definition at line 246 of file eagle_soc.h.

◆ FUNC_SDDATA3

#define FUNC_SDDATA3 0

Definition at line 250 of file eagle_soc.h.

◆ FUNC_SPICLK

#define FUNC_SPICLK 1

Definition at line 235 of file eagle_soc.h.

◆ FUNC_SPICS0

#define FUNC_SPICS0 1

Definition at line 255 of file eagle_soc.h.

◆ FUNC_SPID

#define FUNC_SPID 1

Definition at line 242 of file eagle_soc.h.

◆ FUNC_SPIHD

#define FUNC_SPIHD 1

Definition at line 247 of file eagle_soc.h.

◆ FUNC_SPIQ

#define FUNC_SPIQ 1

Definition at line 238 of file eagle_soc.h.

◆ FUNC_SPIWP

#define FUNC_SPIWP 1

Definition at line 251 of file eagle_soc.h.

◆ FUNC_U0RTS

#define FUNC_U0RTS 4

Definition at line 227 of file eagle_soc.h.

Referenced by uart_config().

◆ FUNC_U0TXD

#define FUNC_U0TXD 0

Definition at line 231 of file eagle_soc.h.

Referenced by uart_config().

◆ FUNC_U0TXD_BK

#define FUNC_U0TXD_BK 4

Definition at line 261 of file eagle_soc.h.

◆ FUNC_U1RXD

#define FUNC_U1RXD 4

Definition at line 243 of file eagle_soc.h.

◆ FUNC_U1TXD

#define FUNC_U1TXD 4

Definition at line 239 of file eagle_soc.h.

◆ FUNC_U1TXD_BK

#define FUNC_U1TXD_BK 2

Definition at line 260 of file eagle_soc.h.

Referenced by uart_config().

◆ GET_PERI_REG_BITS

#define GET_PERI_REG_BITS	(	reg,
		hipos,
		lowpos
	)	((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))

Definition at line 72 of file eagle_soc.h.

◆ GPIO_AS_PIN_SOURCE

#define GPIO_AS_PIN_SOURCE 0

Definition at line 159 of file eagle_soc.h.

◆ GPIO_ENABLE_ADDRESS

#define GPIO_ENABLE_ADDRESS 0x0c

Definition at line 103 of file eagle_soc.h.

◆ GPIO_ENABLE_W1TC_ADDRESS

#define GPIO_ENABLE_W1TC_ADDRESS 0x14

Definition at line 105 of file eagle_soc.h.

◆ GPIO_ENABLE_W1TS_ADDRESS

#define GPIO_ENABLE_W1TS_ADDRESS 0x10

Definition at line 104 of file eagle_soc.h.

◆ GPIO_ID_NONE

#define GPIO_ID_NONE 0xffffffff

Definition at line 127 of file eagle_soc.h.

◆ GPIO_ID_PIN

#define GPIO_ID_PIN ( n ) (GPIO_ID_PIN0+(n))

Definition at line 125 of file eagle_soc.h.

◆ GPIO_ID_PIN0

#define GPIO_ID_PIN0 0

Definition at line 124 of file eagle_soc.h.

◆ GPIO_IN_ADDRESS

#define GPIO_IN_ADDRESS 0x18

Definition at line 108 of file eagle_soc.h.

◆ GPIO_LAST_REGISTER_ID

#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)

Definition at line 126 of file eagle_soc.h.

◆ GPIO_OUT_ADDRESS

#define GPIO_OUT_ADDRESS 0x00

Definition at line 99 of file eagle_soc.h.

Referenced by ac_test_timer_func(), and led_blinker_timer_func().

◆ GPIO_OUT_W1TC_ADDRESS

#define GPIO_OUT_W1TC_ADDRESS 0x08

Definition at line 101 of file eagle_soc.h.

◆ GPIO_OUT_W1TC_DATA_MASK

#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff

Definition at line 106 of file eagle_soc.h.

◆ GPIO_OUT_W1TS_ADDRESS

#define GPIO_OUT_W1TS_ADDRESS 0x04

Definition at line 100 of file eagle_soc.h.

◆ GPIO_PAD_DRIVER_DISABLE

#define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE)

Definition at line 152 of file eagle_soc.h.

◆ GPIO_PAD_DRIVER_ENABLE

#define GPIO_PAD_DRIVER_ENABLE 1

Definition at line 151 of file eagle_soc.h.

◆ GPIO_PIN0_ADDRESS

#define GPIO_PIN0_ADDRESS 0x28

Definition at line 122 of file eagle_soc.h.

◆ GPIO_PIN_CONFIG_GET

#define GPIO_PIN_CONFIG_GET ( x ) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)

Definition at line 134 of file eagle_soc.h.

◆ GPIO_PIN_CONFIG_LSB

#define GPIO_PIN_CONFIG_LSB 11

Definition at line 132 of file eagle_soc.h.

◆ GPIO_PIN_CONFIG_MASK

#define GPIO_PIN_CONFIG_MASK 0x00001800

Definition at line 133 of file eagle_soc.h.

◆ GPIO_PIN_CONFIG_MSB

#define GPIO_PIN_CONFIG_MSB 12

Definition at line 131 of file eagle_soc.h.

◆ GPIO_PIN_CONFIG_SET

#define GPIO_PIN_CONFIG_SET ( x ) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)

Definition at line 135 of file eagle_soc.h.

◆ GPIO_PIN_COUNT

#define GPIO_PIN_COUNT 16

Definition at line 129 of file eagle_soc.h.

◆ GPIO_PIN_INT_TYPE_GET

#define GPIO_PIN_INT_TYPE_GET ( x ) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)

Definition at line 148 of file eagle_soc.h.

◆ GPIO_PIN_INT_TYPE_LSB

#define GPIO_PIN_INT_TYPE_LSB 7

Definition at line 147 of file eagle_soc.h.

◆ GPIO_PIN_INT_TYPE_MASK

#define GPIO_PIN_INT_TYPE_MASK 0x380

Definition at line 145 of file eagle_soc.h.

◆ GPIO_PIN_INT_TYPE_MSB

#define GPIO_PIN_INT_TYPE_MSB 9

Definition at line 146 of file eagle_soc.h.

◆ GPIO_PIN_INT_TYPE_SET

#define GPIO_PIN_INT_TYPE_SET ( x ) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)

Definition at line 149 of file eagle_soc.h.

◆ GPIO_PIN_PAD_DRIVER_GET

#define GPIO_PIN_PAD_DRIVER_GET ( x ) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)

Definition at line 156 of file eagle_soc.h.

◆ GPIO_PIN_PAD_DRIVER_LSB

#define GPIO_PIN_PAD_DRIVER_LSB 2

Definition at line 154 of file eagle_soc.h.

◆ GPIO_PIN_PAD_DRIVER_MASK

#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004

Definition at line 155 of file eagle_soc.h.

◆ GPIO_PIN_PAD_DRIVER_MSB

#define GPIO_PIN_PAD_DRIVER_MSB 2

Definition at line 153 of file eagle_soc.h.

◆ GPIO_PIN_PAD_DRIVER_SET

#define GPIO_PIN_PAD_DRIVER_SET ( x ) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)

Definition at line 157 of file eagle_soc.h.

◆ GPIO_PIN_SOURCE_GET

#define GPIO_PIN_SOURCE_GET ( x ) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB)

Definition at line 164 of file eagle_soc.h.

◆ GPIO_PIN_SOURCE_LSB

#define GPIO_PIN_SOURCE_LSB 0

Definition at line 162 of file eagle_soc.h.

◆ GPIO_PIN_SOURCE_MASK

#define GPIO_PIN_SOURCE_MASK 0x00000001

Definition at line 163 of file eagle_soc.h.

◆ GPIO_PIN_SOURCE_MSB

#define GPIO_PIN_SOURCE_MSB 0

Definition at line 161 of file eagle_soc.h.

◆ GPIO_PIN_SOURCE_SET

#define GPIO_PIN_SOURCE_SET ( x ) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK)

Definition at line 165 of file eagle_soc.h.

◆ GPIO_PIN_WAKEUP_ENABLE_GET

#define GPIO_PIN_WAKEUP_ENABLE_GET ( x ) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)

Definition at line 142 of file eagle_soc.h.

◆ GPIO_PIN_WAKEUP_ENABLE_LSB

#define GPIO_PIN_WAKEUP_ENABLE_LSB 10

Definition at line 140 of file eagle_soc.h.

◆ GPIO_PIN_WAKEUP_ENABLE_MASK

#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400

Definition at line 141 of file eagle_soc.h.

◆ GPIO_PIN_WAKEUP_ENABLE_MSB

#define GPIO_PIN_WAKEUP_ENABLE_MSB 10

Definition at line 139 of file eagle_soc.h.

◆ GPIO_PIN_WAKEUP_ENABLE_SET

#define GPIO_PIN_WAKEUP_ENABLE_SET ( x ) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)

Definition at line 143 of file eagle_soc.h.

◆ GPIO_REG_READ

#define GPIO_REG_READ ( reg ) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + reg)

Definition at line 97 of file eagle_soc.h.

Referenced by ac_test_timer_func(), and led_blinker_timer_func().

◆ GPIO_REG_WRITE

#define GPIO_REG_WRITE	(	reg,
		val
	)	WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + reg, val)

Definition at line 98 of file eagle_soc.h.

◆ GPIO_RTC_CALIB_SYNC

#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c

Definition at line 115 of file eagle_soc.h.

◆ GPIO_RTC_CALIB_VALUE

#define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70

Definition at line 118 of file eagle_soc.h.

◆ GPIO_STATUS_ADDRESS

#define GPIO_STATUS_ADDRESS 0x1c

Definition at line 110 of file eagle_soc.h.

◆ GPIO_STATUS_INTERRUPT_MASK

#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff

Definition at line 113 of file eagle_soc.h.

◆ GPIO_STATUS_W1TC_ADDRESS

#define GPIO_STATUS_W1TC_ADDRESS 0x24

Definition at line 112 of file eagle_soc.h.

◆ GPIO_STATUS_W1TS_ADDRESS

#define GPIO_STATUS_W1TS_ADDRESS 0x20

Definition at line 111 of file eagle_soc.h.

◆ GPIO_WAKEUP_DISABLE

#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE)

Definition at line 138 of file eagle_soc.h.

◆ GPIO_WAKEUP_ENABLE

#define GPIO_WAKEUP_ENABLE 1

Definition at line 137 of file eagle_soc.h.

◆ NOW

#define NOW ( ) RTC_REG_READ(FRC2_COUNT_ADDRESS)

Definition at line 173 of file eagle_soc.h.

Referenced by sys_now().

◆ PAD_XPD_DCDC_CONF

#define PAD_XPD_DCDC_CONF (REG_RTC_BASE + 0x0A0)

Definition at line 203 of file eagle_soc.h.

Referenced by gpio16_input_conf(), and gpio16_output_conf().

◆ PERIPHS_DPORT_BASEADDR

#define PERIPHS_DPORT_BASEADDR 0x3ff00000

Definition at line 83 of file eagle_soc.h.

◆ PERIPHS_GPIO_BASEADDR

#define PERIPHS_GPIO_BASEADDR 0x60000300

Definition at line 84 of file eagle_soc.h.

◆ PERIPHS_IO_MUX

#define PERIPHS_IO_MUX 0x60000800

Definition at line 87 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_CONF_U

#define PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00)

Definition at line 216 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_FUNC

#define PERIPHS_IO_MUX_FUNC 0x13

Definition at line 207 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_FUNC_S

#define PERIPHS_IO_MUX_FUNC_S 4

Definition at line 208 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_GPIO0_U

#define PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34)

Definition at line 256 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_GPIO2_U

#define PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38)

Definition at line 258 of file eagle_soc.h.

Referenced by led_init(), and uart_config().

◆ PERIPHS_IO_MUX_GPIO4_U

#define PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C)

Definition at line 262 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_GPIO5_U

#define PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40)

Definition at line 264 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_MTCK_U

#define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08)

Definition at line 221 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_MTDI_U

#define PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04)

Definition at line 219 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_MTDO_U

#define PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10)

Definition at line 225 of file eagle_soc.h.

Referenced by ac_out_init(), spi_init_gpio(), and uart_config().

◆ PERIPHS_IO_MUX_MTMS_U

#define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C)

Definition at line 223 of file eagle_soc.h.

Referenced by ac_out_init(), and spi_init_gpio().

◆ PERIPHS_IO_MUX_OE

#define PERIPHS_IO_MUX_OE BIT0

Definition at line 214 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_PULLUP

#define PERIPHS_IO_MUX_PULLUP BIT7

Definition at line 209 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_PULLUP2

#define PERIPHS_IO_MUX_PULLUP2 BIT6

Definition at line 210 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_SD_CLK_U

#define PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c)

Definition at line 233 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_SD_CMD_U

#define PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30)

Definition at line 253 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_SD_DATA0_U

#define PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20)

Definition at line 236 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_SD_DATA1_U

#define PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24)

Definition at line 240 of file eagle_soc.h.

Referenced by spi_init_gpio().

◆ PERIPHS_IO_MUX_SD_DATA2_U

#define PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28)

Definition at line 245 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_SD_DATA3_U

#define PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c)

Definition at line 249 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_SLEEP_OE

#define PERIPHS_IO_MUX_SLEEP_OE BIT1

Definition at line 213 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_SLEEP_PULLUP

#define PERIPHS_IO_MUX_SLEEP_PULLUP BIT3

Definition at line 211 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_SLEEP_PULLUP2

#define PERIPHS_IO_MUX_SLEEP_PULLUP2 BIT2

Definition at line 212 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_U0RXD_U

#define PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14)

Definition at line 228 of file eagle_soc.h.

◆ PERIPHS_IO_MUX_U0TXD_U

#define PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18)

Definition at line 230 of file eagle_soc.h.

Referenced by uart_config().

◆ PERIPHS_RTC_BASEADDR

#define PERIPHS_RTC_BASEADDR 0x60000700

Definition at line 86 of file eagle_soc.h.

◆ PERIPHS_TIMER_BASEDDR

#define PERIPHS_TIMER_BASEDDR 0x60000600

Definition at line 85 of file eagle_soc.h.

◆ PIN_FUNC_SELECT

#define PIN_FUNC_SELECT	(	PIN_NAME,
		FUNC
	)

Value:

do { \
    WRITE_PERI_REG(PIN_NAME,   \
                                READ_PERI_REG(PIN_NAME) \
                                     &  (~(PERIPHS_IO_MUX_FUNC<<PERIPHS_IO_MUX_FUNC_S))  \
                                     |( (((FUNC&BIT2)<<2)|(FUNC&0x3))<<PERIPHS_IO_MUX_FUNC_S) );  \
    } while (0)

Definition at line 270 of file eagle_soc.h.

Referenced by ac_out_init(), led_init(), spi_init_gpio(), and uart_config().

◆ PIN_PULLUP_DIS

#define PIN_PULLUP_DIS ( PIN_NAME ) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)

Definition at line 267 of file eagle_soc.h.

Referenced by uart_config().

◆ PIN_PULLUP_EN

#define PIN_PULLUP_EN ( PIN_NAME ) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)

Definition at line 268 of file eagle_soc.h.

◆ READ_PERI_REG

#define READ_PERI_REG ( addr ) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))

Definition at line 68 of file eagle_soc.h.

Referenced by gpio16_input_conf(), gpio16_input_get(), gpio16_output_conf(), gpio16_output_set(), spi_transaction(), uart0_rx_intr_handler(), and uart_tx_one_char().

◆ REG_RTC_BASE

#define REG_RTC_BASE PERIPHS_RTC_BASEADDR

Definition at line 192 of file eagle_soc.h.

◆ RTC_CALIB_RDY_S

#define RTC_CALIB_RDY_S 31

Definition at line 119 of file eagle_soc.h.

◆ RTC_CALIB_START

#define RTC_CALIB_START BIT31

Definition at line 116 of file eagle_soc.h.

◆ RTC_CALIB_VALUE_MASK

#define RTC_CALIB_VALUE_MASK 0xfffff

Definition at line 120 of file eagle_soc.h.

◆ RTC_CLR_REG_MASK

#define RTC_CLR_REG_MASK	(	reg,
		mask
	)	CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)

Definition at line 171 of file eagle_soc.h.

◆ RTC_GPIO_CONF

#define RTC_GPIO_CONF (REG_RTC_BASE + 0x090)

Definition at line 202 of file eagle_soc.h.

Referenced by gpio16_input_conf(), and gpio16_output_conf().

◆ RTC_GPIO_ENABLE

#define RTC_GPIO_ENABLE (REG_RTC_BASE + 0x074)

Definition at line 200 of file eagle_soc.h.

Referenced by gpio16_input_conf(), and gpio16_output_conf().

◆ RTC_GPIO_IN_DATA

#define RTC_GPIO_IN_DATA (REG_RTC_BASE + 0x08C)

Definition at line 201 of file eagle_soc.h.

Referenced by gpio16_input_get().

◆ RTC_GPIO_OUT

#define RTC_GPIO_OUT (REG_RTC_BASE + 0x068)

Definition at line 199 of file eagle_soc.h.

Referenced by gpio16_output_set().

◆ RTC_PERIOD_NUM_MASK

#define RTC_PERIOD_NUM_MASK 0x3ff

Definition at line 117 of file eagle_soc.h.

◆ RTC_REG_READ

#define RTC_REG_READ ( addr ) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)

Definition at line 169 of file eagle_soc.h.

◆ RTC_REG_WRITE

#define RTC_REG_WRITE	(	addr,
		val
	)	WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)

Definition at line 170 of file eagle_soc.h.

◆ RTC_STORE0

#define RTC_STORE0 (REG_RTC_BASE + 0x030)

Definition at line 194 of file eagle_soc.h.

◆ RTC_STORE1

#define RTC_STORE1 (REG_RTC_BASE + 0x034)

Definition at line 195 of file eagle_soc.h.

◆ RTC_STORE2

#define RTC_STORE2 (REG_RTC_BASE + 0x038)

Definition at line 196 of file eagle_soc.h.

◆ RTC_STORE3

#define RTC_STORE3 (REG_RTC_BASE + 0x03C)

Definition at line 197 of file eagle_soc.h.

◆ SET_PERI_REG_BITS

#define SET_PERI_REG_BITS	(	reg,
		bit_map,
		value,
		shift
	)	(WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))\|((value)<<(shift)) ))

Definition at line 73 of file eagle_soc.h.

Referenced by uart_set_stop_bits(), and uart_set_word_length().

◆ SET_PERI_REG_MASK

#define SET_PERI_REG_MASK	(	reg,
		mask
	)	WRITE_PERI_REG((reg), (READ_PERI_REG(reg)\|(mask)))

Definition at line 71 of file eagle_soc.h.

Referenced by ext_spi_init(), spi_init(), spi_mode(), spi_rx_byte_order(), spi_transaction(), spi_tx_byte_order(), uart_config(), uart_set_line_inverse(), and uart_set_parity().

◆ SIGMA_AS_PIN_SOURCE

#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)

Definition at line 160 of file eagle_soc.h.

◆ SPI0_CLK_EQU_SYS_CLK

#define SPI0_CLK_EQU_SYS_CLK BIT8

Definition at line 217 of file eagle_soc.h.

◆ SPI1_CLK_EQU_SYS_CLK

#define SPI1_CLK_EQU_SYS_CLK BIT9

Definition at line 218 of file eagle_soc.h.

◆ TIMER_CLK_FREQ

#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8)

Definition at line 79 of file eagle_soc.h.

Referenced by sys_now().

◆ TM1_EDGE_INT_DISABLE

#define TM1_EDGE_INT_DISABLE ( ) CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)

Definition at line 93 of file eagle_soc.h.

◆ TM1_EDGE_INT_ENABLE

#define TM1_EDGE_INT_ENABLE ( ) SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)

Definition at line 92 of file eagle_soc.h.

◆ UART_CLK_FREQ

#define UART_CLK_FREQ APB_CLK_FREQ

Definition at line 78 of file eagle_soc.h.

Referenced by uart_config(), and uart_set_baudrate().

◆ WRITE_PERI_REG

#define WRITE_PERI_REG	(	addr,
		val
	)	(((volatile uint32_t )ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)

Definition at line 69 of file eagle_soc.h.

Referenced by gpio16_input_conf(), gpio16_output_conf(), gpio16_output_set(), spi_clock(), spi_init_gpio(), spi_transaction(), uart0_rx_intr_handler(), uart_config(), and uart_tx_one_char().

Macros

Macro Definition Documentation

◆ APB_CLK_FREQ

◆ BIT0

◆ BIT1

◆ BIT10

◆ BIT11

◆ BIT12

◆ BIT13

◆ BIT14

◆ BIT15

◆ BIT16

◆ BIT17

◆ BIT18

◆ BIT19

◆ BIT2

◆ BIT20

◆ BIT21

◆ BIT22

◆ BIT23

◆ BIT24

◆ BIT25

◆ BIT26

◆ BIT27

◆ BIT28

◆ BIT29

◆ BIT3

◆ BIT30

◆ BIT31

◆ BIT4

◆ BIT5

◆ BIT6

◆ BIT7

◆ BIT8

◆ BIT9

◆ CLEAR_PERI_REG_MASK

◆ EDGE_INT_ENABLE_REG

◆ ETS_CACHED_ADDR

◆ ETS_UNCACHED_ADDR

◆ FRC1_COUNT_ADDRESS

◆ FRC1_CTRL_ADDRESS

◆ FRC1_INT_ADDRESS

◆ FRC1_INT_CLR_MASK

◆ FRC1_LOAD_ADDRESS

◆ FRC2_COUNT_ADDRESS

◆ FUNC_GPIO0

◆ FUNC_GPIO1

◆ FUNC_GPIO10

◆ FUNC_GPIO12

◆ FUNC_GPIO13

◆ FUNC_GPIO14

◆ FUNC_GPIO15

◆ FUNC_GPIO2

◆ FUNC_GPIO3

◆ FUNC_GPIO4

◆ FUNC_GPIO5

◆ FUNC_GPIO9

◆ FUNC_SDCLK

◆ FUNC_SDCMD

◆ FUNC_SDDATA0

◆ FUNC_SDDATA1

◆ FUNC_SDDATA1_U1RXD

◆ FUNC_SDDATA2

◆ FUNC_SDDATA3

◆ FUNC_SPICLK

◆ FUNC_SPICS0

◆ FUNC_SPID

◆ FUNC_SPIHD

◆ FUNC_SPIQ

◆ FUNC_SPIWP

◆ FUNC_U0RTS

◆ FUNC_U0TXD

◆ FUNC_U0TXD_BK

◆ FUNC_U1RXD

◆ FUNC_U1TXD

◆ FUNC_U1TXD_BK

◆ GET_PERI_REG_BITS

◆ GPIO_AS_PIN_SOURCE

◆ GPIO_ENABLE_ADDRESS

◆ GPIO_ENABLE_W1TC_ADDRESS