uart.c File Reference

#include <esp8266.h>
#include "driver/uart.h"
#include "driver/uart_register.h"
#include "user_interface.h"
#include "kmp_request.h"

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Functions
LOCAL void	uart0_rx_intr_handler (void *para)
LOCAL void ICACHE_FLASH_ATTR	uart_config (uint8 uart_no)
STATUS	uart_tx_one_char (uint8 uart, uint8 TxChar)
void ICACHE_FLASH_ATTR	uart1_write_char (char c)
void ICACHE_FLASH_ATTR	uart0_write_char (char c)
void ICACHE_FLASH_ATTR	uart0_tx_buffer (uint8 *buf, uint16 len)
void ICACHE_FLASH_ATTR	uart0_sendStr (const char *str)
void ICACHE_FLASH_ATTR	uart_init (UartBautRate uart0_br, UartBautRate uart1_br)
void ICACHE_FLASH_ATTR	uart_set_word_length (uint8_t uart_no, UartBitsNum4Char len)
void ICACHE_FLASH_ATTR	uart_set_stop_bits (uint8_t uart_no, UartStopBitsNum bit_num)
void ICACHE_FLASH_ATTR	uart_set_line_inverse (uint8_t uart_no, UART_LineLevelInverse inverse_mask)
void ICACHE_FLASH_ATTR	uart_set_parity (uint8_t uart_no, UartParityMode Parity_mode)
void ICACHE_FLASH_ATTR	uart_set_baudrate (uint8 uart_no, uint32_t baud_rate)

Variables
UartDevice	UartDev

Function Documentation

uart0_rx_intr_handler()

LOCAL void uart0_rx_intr_handler

(

void *

para

)

Definition at line 199 of file uart.c.

References en61107_fifo_put(), en61107_is_eod_char(), en61107_received_task_prio, ICACHE_FLASH_ATTR, kmp_fifo_put(), kmp_received_task_prio, READ_PERI_REG, system_os_post(), UART0, UART_FIFO, UART_FRM_ERR_INT_CLR, UART_FRM_ERR_INT_ST, UART_INT_CLR, UART_INT_ST, UART_RXFIFO_CNT, UART_RXFIFO_CNT_S, UART_RXFIFO_FULL_INT_CLR, UART_RXFIFO_FULL_INT_ST, UART_RXFIFO_TOUT_INT_CLR, UART_RXFIFO_TOUT_INT_ST, UART_STATUS, and WRITE_PERI_REG.

Referenced by uart_config().

{
  /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
    * uart1 and uart0 respectively
    */
//  RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;

    uint8 RcvChar;
    uint8 uart_no = UART0;//UartDev.buff_uart_no;


    if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
        //os_printf("FRM_ERR\r\n");
        WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
    }

    if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
        //ETS_UART_INTR_DISABLE();/////////
        while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
            //WRITE_PERI_REG(0X60000914, 0x73); //WTD
            RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
#ifdef EN61107
            en61107_fifo_put(RcvChar);
            if (en61107_is_eod_char(RcvChar)) {                         // if end of mc66 frame received
                system_os_post(en61107_received_task_prio, 0, 0);
            }
#elif defined IMPULSE
            // nothing
#else
            kmp_fifo_put(RcvChar);
            if ((RcvChar == '\r')  || (RcvChar == 0x06)) {              // if end of kmp frame received or acknowledge
                system_os_post(kmp_received_task_prio, 0, 0);
            }
#endif      
        }
    }
    else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
        //ETS_UART_INTR_DISABLE();/////////
        while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
            //WRITE_PERI_REG(0X60000914, 0x73); //WTD
            RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
#ifdef EN61107
            en61107_fifo_put(RcvChar);
            if (en61107_is_eod_char(RcvChar)) {                         // if end of mc66 frame received
                system_os_post(en61107_received_task_prio, 0, 0);
            }
#elif defined IMPULSE
            // nothing
#else
            kmp_fifo_put(RcvChar);
            if ((RcvChar == '\r')  || (RcvChar == 0x06)) {              // if end of kmp frame received or acknowledge
                system_os_post(kmp_received_task_prio, 0, 0);
            }
#endif      
        }
    }

    if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
        WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
    }
    else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST)) {
        WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
    }
    //ETS_UART_INTR_ENABLE();
}

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uart0_sendStr()

void ICACHE_FLASH_ATTR uart0_sendStr

(

const char *

str

)

Definition at line 181 of file uart.c.

References LOCAL, UART0, and uart_tx_one_char().

{
    while(*str)
    {
        uart_tx_one_char(UART0, *str++);
    }
}

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uart0_tx_buffer()

void ICACHE_FLASH_ATTR uart0_tx_buffer	(	uint8 *	buf,
		uint16	len
	)

Definition at line 163 of file uart.c.

References ICACHE_FLASH_ATTR, UART0, and uart_tx_one_char().

Referenced by en61107_uart_send_en61107(), en61107_uart_send_en61107_ident(), en61107_uart_send_inst_values(), en61107_uart_send_standard_data_1(), en61107_uart_send_standard_data_2(), kmp_get_register_timer_func(), and kmp_get_serial_timer_func().

{
  uint16 i;

  for (i = 0; i < len; i++)
  {
    uart_tx_one_char(UART0, buf[i]);
  }
}

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uart0_write_char()

void ICACHE_FLASH_ATTR uart0_write_char

(

char

c

)

Definition at line 143 of file uart.c.

References ICACHE_FLASH_ATTR, UART0, and uart_tx_one_char().

Referenced by uart_init().

{
  if (c == '\n')
  {
    uart_tx_one_char(UART0, '\r');
    uart_tx_one_char(UART0, '\n');
  }
  else
  {
    uart_tx_one_char(UART0, c);
  }
}

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uart1_write_char()

void ICACHE_FLASH_ATTR uart1_write_char

(

char

c

)

Definition at line 126 of file uart.c.

References ICACHE_FLASH_ATTR, UART1, and uart_tx_one_char().

{
  if (c == '\n')
  {
    uart_tx_one_char(UART1, '\r');
    uart_tx_one_char(UART1, '\n');
  }
  else if (c == '\r')
  {
  }
  else
  {
    uart_tx_one_char(UART1, c);
  }
}

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uart_config()

LOCAL void ICACHE_FLASH_ATTR uart_config

(

uint8

uart_no

)

Definition at line 39 of file uart.c.

References UartDevice::baut_rate, CLEAR_PERI_REG_MASK, UartDevice::data_bits, ETS_UART_INTR_ATTACH, UartDevice::exist_parity, FUNC_U0RTS, FUNC_U0TXD, FUNC_U1TXD_BK, NONE_BITS, UartDevice::parity, PERIPHS_IO_MUX_GPIO2_U, PERIPHS_IO_MUX_MTDO_U, PERIPHS_IO_MUX_U0TXD_U, PIN_FUNC_SELECT, PIN_PULLUP_DIS, UartDevice::rcv_buff, SET_PERI_REG_MASK, STICK_PARITY_DIS, STICK_PARITY_EN, UartDevice::stop_bits, RcvMsgBuff::TrigLvl, UART0, uart0_rx_intr_handler(), UART1, UART_BIT_NUM, UART_BIT_NUM_S, UART_CLK_FREQ, UART_CONF0, UART_CONF1, UART_FRM_ERR_INT_ENA, UART_INT_CLR, UART_INT_ENA, UART_PARITY_EN_M, UART_PARITY_EN_S, UART_PARITY_M, UART_PARITY_S, UART_RX_FLOW_EN, UART_RX_FLOW_THRHD, UART_RX_FLOW_THRHD_S, UART_RX_TOUT_EN, UART_RX_TOUT_THRHD, UART_RX_TOUT_THRHD_S, UART_RXFIFO_FULL_INT_ENA, UART_RXFIFO_FULL_THRHD, UART_RXFIFO_FULL_THRHD_S, UART_RXFIFO_RST, UART_RXFIFO_TOUT_INT_ENA, UART_STOP_BIT_NUM, UART_STOP_BIT_NUM_S, UART_TXFIFO_RST, and WRITE_PERI_REG.

Referenced by uart_init().

{
  if (uart_no == UART1)
  {
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
  }
  else
  {
    /* rcv_buff size if 0x100 */
    ETS_UART_INTR_ATTACH(uart0_rx_intr_handler,  &(UartDev.rcv_buff));
    PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
  }

  uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));

  UartDev.exist_parity = (UartDev.parity == NONE_BITS ? STICK_PARITY_DIS : STICK_PARITY_EN);
  WRITE_PERI_REG(UART_CONF0(uart_no),
            ((UartDev.exist_parity & UART_PARITY_EN_M)  <<  UART_PARITY_EN_S) |
            ((UartDev.parity & UART_PARITY_M) << UART_PARITY_S ) |
            ((UartDev.stop_bits & UART_STOP_BIT_NUM) << UART_STOP_BIT_NUM_S) |
            ((UartDev.data_bits & UART_BIT_NUM) << UART_BIT_NUM_S));

  //clear rx and tx fifo,not ready
  SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
  CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);

  //set rx fifo trigger
//  WRITE_PERI_REG(UART_CONF1(uart_no),
//                 ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
//                 ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) |
//                 UART_RX_FLOW_EN);
  if (uart_no == UART0)
  {
    //set rx fifo trigger
    WRITE_PERI_REG(UART_CONF1(uart_no),
                   ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
                   ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
                   UART_RX_FLOW_EN |
                   (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
                   UART_RX_TOUT_EN);
    SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
                      UART_FRM_ERR_INT_ENA);
  }
  else
  {
    WRITE_PERI_REG(UART_CONF1(uart_no),
                   ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
  }

  //clear all interrupt
  WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
  //enable rx_interrupt
  SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
}

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uart_init()

void ICACHE_FLASH_ATTR uart_init	(	UartBautRate	uart0_br,
		UartBautRate	uart1_br
	)

Definition at line 273 of file uart.c.

References UartDevice::baut_rate, UartDevice::data_bits, EIGHT_BITS, ETS_UART_INTR_ENABLE, EVEN_BITS, UartDevice::exist_parity, ICACHE_FLASH_ATTR, NONE_BITS, os_install_putc1, UartDevice::parity, SEVEN_BITS, STICK_PARITY_DIS, STICK_PARITY_EN, UartDevice::stop_bits, TWO_STOP_BIT, UART0, uart0_write_char(), UART1, and uart_config().

{
  // rom use 74880 baut_rate, here reinitialize
#ifndef EN61107
  UartDev.baut_rate = uart0_br;
  UartDev.exist_parity = STICK_PARITY_DIS;
  UartDev.data_bits = EIGHT_BITS;
  UartDev.parity = NONE_BITS;
  UartDev.stop_bits = TWO_STOP_BIT;
#else
  UartDev.baut_rate = uart0_br;
  UartDev.exist_parity = STICK_PARITY_EN;
  UartDev.data_bits = SEVEN_BITS;
  UartDev.parity = EVEN_BITS;
  UartDev.stop_bits = TWO_STOP_BIT;
#endif
  uart_config(UART0);
#ifndef EN61107
  UartDev.baut_rate = uart1_br;
  UartDev.exist_parity = STICK_PARITY_DIS;
  UartDev.data_bits = EIGHT_BITS;
  UartDev.parity = NONE_BITS;
  UartDev.stop_bits = TWO_STOP_BIT;
#else
  UartDev.baut_rate = uart1_br;
  UartDev.exist_parity = STICK_PARITY_EN;
  UartDev.data_bits = SEVEN_BITS;
  UartDev.parity = EVEN_BITS;
  UartDev.stop_bits = TWO_STOP_BIT;
#endif
  uart_config(UART1);
  ETS_UART_INTR_ENABLE();

  // install uart1 putc callback
  os_install_putc1((void *)uart0_write_char);
}

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uart_set_baudrate()

void ICACHE_FLASH_ATTR uart_set_baudrate	(	uint8	uart_no,
		uint32_t	baud_rate
	)

Definition at line 337 of file uart.c.

References UART_CLK_FREQ.

Referenced by en61107_delayed_uart_change_setting_timer_func(), en61107_uart_send_en61107(), en61107_uart_send_en61107_ident(), en61107_uart_send_inst_values(), en61107_uart_send_standard_data_1(), and en61107_uart_send_standard_data_2().

                                                     {
    uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate);
}

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uart_set_line_inverse()

void ICACHE_FLASH_ATTR uart_set_line_inverse	(	uint8_t	uart_no,
		UART_LineLevelInverse	inverse_mask
	)

Definition at line 321 of file uart.c.

References CLEAR_PERI_REG_MASK, ICACHE_FLASH_ATTR, SET_PERI_REG_MASK, UART_CONF0, and UART_LINE_INV_MASK.

                                                                           {
    CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK);
    SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask);
}

uart_set_parity()

void ICACHE_FLASH_ATTR uart_set_parity	(	uint8_t	uart_no,
		UartParityMode	Parity_mode
	)

Definition at line 327 of file uart.c.

References CLEAR_PERI_REG_MASK, ICACHE_FLASH_ATTR, NONE_BITS, SET_PERI_REG_MASK, UART_CONF0, UART_PARITY, and UART_PARITY_EN.

Referenced by en61107_uart_send_en61107(), en61107_uart_send_en61107_ident(), en61107_uart_send_inst_values(), en61107_uart_send_standard_data_1(), and en61107_uart_send_standard_data_2().

                                                             {
    CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN);
    if (Parity_mode == NONE_BITS) {
    }
    else {
        SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode| UART_PARITY_EN);
    }
}

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uart_set_stop_bits()

void ICACHE_FLASH_ATTR uart_set_stop_bits	(	uint8_t	uart_no,
		UartStopBitsNum	bit_num
	)

Definition at line 316 of file uart.c.

References ICACHE_FLASH_ATTR, SET_PERI_REG_BITS, UART_CONF0, UART_STOP_BIT_NUM, and UART_STOP_BIT_NUM_S.

Referenced by en61107_delayed_uart_change_setting_timer_func(), en61107_uart_send_en61107(), en61107_uart_send_en61107_ident(), en61107_uart_send_inst_values(), en61107_uart_send_standard_data_1(), and en61107_uart_send_standard_data_2().

                                                             {
    SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S);
}

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uart_set_word_length()

void ICACHE_FLASH_ATTR uart_set_word_length	(	uint8_t	uart_no,
		UartBitsNum4Char	len
	)

Definition at line 311 of file uart.c.

References ICACHE_FLASH_ATTR, SET_PERI_REG_BITS, UART_BIT_NUM, UART_BIT_NUM_S, and UART_CONF0.

Referenced by en61107_uart_send_en61107(), en61107_uart_send_en61107_ident(), en61107_uart_send_inst_values(), en61107_uart_send_standard_data_1(), and en61107_uart_send_standard_data_2().

                                                            {
    SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S);
}

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uart_tx_one_char()

STATUS uart_tx_one_char	(	uint8	uart,
		uint8	TxChar
	)

Definition at line 104 of file uart.c.

References ICACHE_FLASH_ATTR, OK, READ_PERI_REG, UART_FIFO, UART_STATUS, UART_TXFIFO_CNT, UART_TXFIFO_CNT_S, and WRITE_PERI_REG.

Referenced by uart0_sendStr(), uart0_tx_buffer(), uart0_write_char(), and uart1_write_char().

{
    while (true)
    {
      uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
      if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
        break;
      }
    }

    WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
    return OK;
}

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Variable Documentation

UartDev

UartDevice UartDev