Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- x -

• XVPHY_BANK_SELECT_REG : xvphy_hw.h
• XVPHY_BANK_SELECT_RX_MASK : xvphy_hw.h
• XVPHY_BANK_SELECT_RX_SHIFT : xvphy_hw.h
• XVPHY_BANK_SELECT_TX_MASK : xvphy_hw.h
• XVPHY_BUFGGT_RXUSRCLK_REG : xvphy_hw.h
• XVPHY_BUFGGT_TXUSRCLK_REG : xvphy_hw.h
• XVphy_CfgErrIntr() : xvphy_intr.c , xvphy_i.h
• XVphy_CfgInitialize() : xvphy.c
• XVphy_CfgLineRate() : xvphy.c
• XVphy_CfgPllRefClkSel() : xvphy_i.c , xvphy_i.h
• XVphy_CfgSysClkDataSel() : xvphy_i.c , xvphy_i.h
• XVphy_CfgSysClkOutSel() : xvphy_i.h , xvphy_i.c
• XVphy_Ch2Ids() : xvphy_i.c , xvphy_i.h
• XVphy_ClkCalcParams() : xvphy_i.c , xvphy_i.h
• XVPHY_CLKDET_CTRL_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_DRU_RAW_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_DRU_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_RX_RAW_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_RX_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_TMR_TO_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_TX_RAW_REG : xvphy_hw.h
• XVPHY_CLKDET_FREQ_TX_REG : xvphy_hw.h
• XVPHY_CLKDET_STAT_REG : xvphy_hw.h
• XVPHY_CLKDET_TMR_RX_REG : xvphy_hw.h
• XVPHY_CLKDET_TMR_TX_REG : xvphy_hw.h
• XVphy_Clkout1OBufTdsEnable() : xvphy.c
• XVphy_ClkReconfig() : xvphy_i.c , xvphy_i.h
• XVphy_ConfigTable : xvphy_sinit.c
• XVPHY_CPLL_CAL_PERIOD_REG : xvphy_hw.h
• XVPHY_CPLL_CAL_TOL_REG : xvphy_hw.h
• XVphy_DirReconfig() : xvphy_i.c , xvphy_i.h
• XVPHY_DRP_CONTROL_CH1_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_CH2_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_CH3_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_CH4_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_COMMON_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_RXMMCM_REG : xvphy_hw.h
• XVPHY_DRP_CONTROL_TXMMCM_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_CH1_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_CH2_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_CH3_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_CH4_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_COMMON_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_RXMMCM_REG : xvphy_hw.h
• XVPHY_DRP_STATUS_TXMMCM_REG : xvphy_hw.h
• XVphy_DrpRd() : xvphy.c
• XVphy_DrpWr() : xvphy.c
• XVPHY_DRU_CFREQ_H_REG : xvphy_hw.h
• XVPHY_DRU_CFREQ_L_REG : xvphy_hw.h
• XVPHY_DRU_CTRL_REG : xvphy_hw.h
• XVPHY_DRU_GAIN_REG : xvphy_hw.h
• XVPHY_DRU_STAT_REG : xvphy_hw.h
• XVPHY_ERR_IRQ : xvphy_hw.h
• XVphy_ErrorHandler() : xvphy_i.c , xvphy_i.h
• XVphy_GetLineRateHz() : xvphy.c
• XVphy_GetPllType() : xvphy.c
• XVphy_GetPllVcoFreqHz() : xvphy_i.c , xvphy_i.h
• XVphy_GetQuadRefClkFreq() : xvphy_i.c , xvphy_i.h
• XVphy_GetRcfgChId() : xvphy_i.c , xvphy_i.h
• XVphy_GetRefClkSourcesCount() : xvphy_i.c , xvphy_i.h
• XVphy_GetSysClkDataSel() : xvphy_i.c , xvphy_i.h
• XVphy_GetSysClkOutSel() : xvphy_i.c , xvphy_i.h
• XVphy_GetVersion() : xvphy.c
• XVphy_GtUserRdyEnable() : xvphy_i.c , xvphy_i.h
• XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK : xvphy_hw.h
• XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK : xvphy_hw.h
• XVPHY_IBUFDS_GTXX_CTRL_REG : xvphy_hw.h
• XVphy_IBufDsEnable() : xvphy.c
• XVphy_In32 : xvphy_hw.h
• XVphy_InterruptHandler() : xvphy_intr.c
• XVPHY_INTR_DIS_REG : xvphy_hw.h
• XVPHY_INTR_EN_REG : xvphy_hw.h
• XVPHY_INTR_MASK_REG : xvphy_hw.h
• XVPHY_INTR_STS_REG : xvphy_hw.h
• XVphy_IntrDisable() : xvphy_i.h , xvphy_intr.c
• XVphy_IntrEnable() : xvphy_i.h , xvphy_intr.c
• XVphy_IsBonded() : xvphy.c
• XVphy_IsHDMI() : xvphy_i.c , xvphy_i.h
• XVphy_IsPllLocked() : xvphy_i.c , xvphy_i.h
• XVphy_LookupConfig() : xvphy_sinit.c
• XVPHY_LOOPBACK_CONTROL_CH_MASK : xvphy_hw.h
• XVPHY_LOOPBACK_CONTROL_CH_SHIFT : xvphy_hw.h
• XVPHY_LOOPBACK_CONTROL_REG : xvphy_hw.h
• XVPHY_MISC_RXUSRCLK_REG : xvphy_hw.h
• XVPHY_MISC_TXUSRCLK_REG : xvphy_hw.h
• XVPHY_MMCM_RXUSRCLK_CTRL_REG : xvphy_hw.h
• XVPHY_MMCM_RXUSRCLK_REG1 : xvphy_hw.h
• XVPHY_MMCM_RXUSRCLK_REG2 : xvphy_hw.h
• XVPHY_MMCM_RXUSRCLK_REG3 : xvphy_hw.h
• XVPHY_MMCM_RXUSRCLK_REG4 : xvphy_hw.h
• XVPHY_MMCM_TXUSRCLK_CTRL_REG : xvphy_hw.h
• XVPHY_MMCM_TXUSRCLK_REG1 : xvphy_hw.h
• XVPHY_MMCM_TXUSRCLK_REG2 : xvphy_hw.h
• XVPHY_MMCM_TXUSRCLK_REG3 : xvphy_hw.h
• XVPHY_MMCM_TXUSRCLK_REG4 : xvphy_hw.h
• XVphy_MmcmLocked() : xvphy_i.c , xvphy_i.h
• XVphy_MmcmLockedMaskEnable() : xvphy_i.c , xvphy_i.h
• XVphy_MmcmPowerDown() : xvphy.c
• XVphy_MmcmReset() : xvphy_i.c , xvphy_i.h
• XVphy_MmcmStart() : xvphy.c
• XVphy_MmcmWriteParameters() : xvphy_i.h , xvphy_mmcme2.c
• XVphy_Out32 : xvphy_hw.h
• XVphy_OutDivReconfig() : xvphy_i.h , xvphy_i.c
• XVPHY_PATGEN_CTRL_REG : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_CPLL_ALL_MASK : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_CPLL_HDMI_MASK : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_CPLL_MASK : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_QPLL0_MASK : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_QPLL1_MASK : xvphy_hw.h
• XVPHY_PLL_LOCK_STATUS_REG : xvphy_hw.h
• XVPHY_PLL_RESET_CPLL_MASK : xvphy_hw.h
• XVPHY_PLL_RESET_QPLL0_MASK : xvphy_hw.h
• XVPHY_PLL_RESET_QPLL1_MASK : xvphy_hw.h
• XVPHY_PLL_RESET_REG : xvphy_hw.h
• XVphy_PllCalculator() : xvphy_i.c , xvphy_i.h
• XVphy_PllInitialize() : xvphy.c
• XVPHY_POWERDOWN_CONTROL_CPLLPD_MASK : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_QPLL0PD_MASK : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_QPLL1PD_MASK : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_REG : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_RXPD_MASK : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_RXPD_SHIFT : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_TXPD_MASK : xvphy_hw.h
• XVPHY_POWERDOWN_CONTROL_TXPD_SHIFT : xvphy_hw.h
• XVphy_PowerDownGtPll() : xvphy_i.h , xvphy_i.c
• XVphy_ReadReg : xvphy_hw.h
• XVPHY_REF_CLK_SEL_CPLL_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_CPLL_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_QPLL0_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_QPLL1_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_QPLL1_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_REG : xvphy_hw.h
• XVPHY_REF_CLK_SEL_RXSYSCLKSEL_DATA_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_RXSYSCLKSEL_DATA_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_RXSYSCLKSEL_OUT_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_RXSYSCLKSEL_OUT_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_SYSCLKSEL_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_SYSCLKSEL_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_TXSYSCLKSEL_DATA_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_TXSYSCLKSEL_DATA_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_TXSYSCLKSEL_OUT_MASK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_TXSYSCLKSEL_OUT_SHIFT : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTEASTREFCLK0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTEASTREFCLK1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTGREFCLK : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTNORTHREFCLK0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTNORTHREFCLK1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTREFCLK0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTREFCLK1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTSOUTHREFCLK0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTSOUTHREFCLK1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTWESTREFCLK0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XPLL_GTWESTREFCLK1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_CPLL : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL1 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_OUT_CH : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN0 : xvphy_hw.h
• XVPHY_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN1 : xvphy_hw.h
• XVphy_RegisterDebug() : xvphy.c
• XVphy_ResetGtPll() : xvphy.c
• XVphy_ResetGtTxRx() : xvphy.c
• XVPHY_RX_CONTROL_REG : xvphy_hw.h
• XVPHY_RX_EQ_CDR_REG : xvphy_hw.h
• XVPHY_RX_INIT_REG : xvphy_hw.h
• XVPHY_RX_INIT_STATUS_REG : xvphy_hw.h
• XVPHY_RX_INIT_USERRDY_ALL_MASK : xvphy_hw.h
• XVPHY_RX_INIT_USERRDY_MASK : xvphy_hw.h
• XVPHY_RX_STATUS_REG : xvphy_hw.h
• XVPHY_RX_TDLOCK_REG : xvphy_hw.h
• XVphy_SelfTest() : xvphy_selftest.c
• XVphy_SetBufgGtDiv() : xvphy_i.h , xvphy_i.c
• XVphy_SetErrorCallback() : xvphy.c
• XVphy_SetIntrHandler() : xvphy_i.h , xvphy_intr.c
• XVphy_SetPolarity() : xvphy.c
• XVphy_SetPrbsSel() : xvphy.c
• XVphy_SetRxLpm() : xvphy.c
• XVphy_SetTxPostCursor() : xvphy.c
• XVphy_SetTxPreEmphasis() : xvphy.c
• XVphy_SetTxVoltageSwing() : xvphy.c
• XVPHY_TX_BUFFER_BYPASS_REG : xvphy_hw.h
• XVPHY_TX_CONTROL_REG : xvphy_hw.h
• XVPHY_TX_DRIVER_CH12_REG : xvphy_hw.h
• XVPHY_TX_DRIVER_CH34_REG : xvphy_hw.h
• XVPHY_TX_INIT_REG : xvphy_hw.h
• XVPHY_TX_INIT_STATUS_REG : xvphy_hw.h
• XVPHY_TX_INIT_USERRDY_ALL_MASK : xvphy_hw.h
• XVPHY_TX_INIT_USERRDY_MASK : xvphy_hw.h
• XVPHY_TX_STATUS_REG : xvphy_hw.h
• XVphy_TxPrbsForceError() : xvphy.c
• XVPHY_TXRX_INIT_GTRESET_ALL_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_GTRESET_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_PCSRESET_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_PLLGTRESET_ALL_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_PLLGTRESET_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_PMARESET_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_STATUS_PMARESETDONE_ALL_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_STATUS_PMARESETDONE_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_STATUS_POWERGOOD_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_STATUS_RESETDONE_ALL_MASK : xvphy_hw.h
• XVPHY_TXRX_INIT_STATUS_RESETDONE_MASK : xvphy_hw.h
• XVPHY_VERSION_CORE_PATCH_MASK : xvphy_hw.h
• XVPHY_VERSION_CORE_PATCH_SHIFT : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_MJR_MASK : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_MJR_SHIFT : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_MNR_MASK : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_MNR_SHIFT : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_REV_MASK : xvphy_hw.h
• XVPHY_VERSION_CORE_VER_REV_SHIFT : xvphy_hw.h
• XVPHY_VERSION_INTER_REV_MASK : xvphy_hw.h
• XVPHY_VERSION_REG : xvphy_hw.h
• XVphy_WaitUs() : xvphy.c
• XVphy_WriteCfgRefClkSelReg() : xvphy_i.h , xvphy_i.c
• XVphy_WriteReg : xvphy_hw.h