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video_common
Vitis Drivers API Documentation
|
Macros | |
| #define | XVidC_EdidIsHeaderValid(E) !memcmp(E, "\x00\xFF\xFF\xFF\xFF\xFF\xFF\x00", 8) |
| Check if EDID header matches valid signature. More... | |
| #define | XVidC_EdidGetIdProdCode(E) |
| Get product code from EDID. More... | |
| #define | XVidC_EdidGetIdSn(E) |
| Extract 32-bit serial number from EDID. More... | |
| #define | XVidC_EdidGetManWeek(E) (E[XVIDC_EDID_VPI_WEEK_MAN]) |
| Get week of manufacture from EDID. More... | |
| #define | XVidC_EdidGetModManYear(E) (E[XVIDC_EDID_VPI_YEAR] + 1990) |
| Get model/manufacture year from EDID. More... | |
| #define | XVidC_EdidIsYearModel(E) (XVidC_EdidGetManWeek(E) == 0xFF) |
| Check if year field represents model year (week=0xFF) More... | |
| #define | XVidC_EdidIsYearMan(E) (XVidC_EdidGetManWeek(E) != 0xFF) |
| Check if year field represents manufacture year (week!=0xFF) More... | |
| #define | XVidC_EdidGetStructVer(E) (E[XVIDC_EDID_STRUCT_VER]) |
| Get EDID structure version number. More... | |
| #define | XVidC_EdidGetStructRev(E) (E[XVIDC_EDID_STRUCT_REV]) |
| Get EDID structure revision number. More... | |
| #define | XVidC_EdidIsDigitalSig(E) ((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) != 0) |
| Check if display uses digital signal input. More... | |
| #define | XVidC_EdidIsAnalogSig(E) ((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) == 0) |
| Check if display uses analog signal input. More... | |
| #define | XVidC_EdidGetAnalogSigLvlStd(E) |
| Get analog signal level standard. More... | |
| #define | XVidC_EdidGetAnalogSigVidSetup(E) |
| Get analog video setup (blank-to-black setup/pedestal) More... | |
| #define | XVidC_EdidSuppAnalogSigSepSyncHv(E) |
| Check if analog separate sync H and V supported. More... | |
| #define | XVidC_EdidSuppAnalogSigCompSyncH(E) |
| Check if analog composite sync on H supported. More... | |
| #define | XVidC_EdidSuppAnalogSigCompSyncG(E) |
| Check if analog composite sync on G (green) supported. More... | |
| #define | XVidC_EdidSuppAnalogSigSerrVsync(E) |
| Check if analog serration on V sync pulse supported. More... | |
| #define | XVidC_EdidGetDigitalSigIfaceStd(E) (E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_DIG_VIS_MASK) |
| Get digital signal video interface standard. More... | |
| #define | XVidC_EdidIsSsArDefined(E) ((E[XVIDC_EDID_BDISP_H_SSAR] | E[XVIDC_EDID_BDISP_V_SSAR]) != 0) |
| Check if screen size or aspect ratio is defined. More... | |
| #define | XVidC_EdidGetSsArH(E) E[XVIDC_EDID_BDISP_H_SSAR] |
| Get horizontal screen size or aspect ratio value. More... | |
| #define | XVidC_EdidGetSsArV(E) E[XVIDC_EDID_BDISP_V_SSAR] |
| Get vertical screen size or aspect ratio value. More... | |
| #define | XVidC_EdidIsSsArSs(E) ((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) != 0)) |
| Check if values represent screen size (both non-zero) More... | |
| #define | XVidC_EdidIsSsArArL(E) ((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) == 0)) |
| Check if values represent landscape aspect ratio (H non-zero, V zero) More... | |
| #define | XVidC_EdidIsSsArArP(E) ((XVidC_EdidGetSsArH(E) == 0) && (XVidC_EdidGetSsArV(E) != 0)) |
| Check if values represent portrait aspect ratio (H zero, V non-zero) More... | |
| #define | XVidC_EdidGetSsArArL(E) ((float)((XVidC_EdidGetSsArH(E) + 99.0) / 100.0)) |
| Calculate landscape aspect ratio. More... | |
| #define | XVidC_EdidGetSsArArP(E) ((float)(100.0 / (XVidC_EdidGetSsArV(E) + 99.0))) |
| Calculate portrait aspect ratio. More... | |
| #define | XVidC_EdidIsGammaInExt(E) (E[XVIDC_EDID_BDISP_GAMMA] == 0xFF) |
| Check if gamma value is stored in extension block. More... | |
| #define | XVidC_EdidGetGamma(E) ((float)((E[XVIDC_EDID_BDISP_GAMMA] + 100.0) / 100.0)) |
| Calculate gamma value from EDID. More... | |
| #define | XVidC_EdidSuppFeaturePmStandby(E) |
| Check if standby power management supported. More... | |
| #define | XVidC_EdidSuppFeaturePmSuspend(E) |
| Check if suspend power management supported. More... | |
| #define | XVidC_EdidSuppFeaturePmOffVlp(E) |
| Check if active-off/very low power supported. More... | |
| #define | XVidC_EdidGetFeatureAnaColorType(E) |
| Get analog display color type. More... | |
| #define | XVidC_EdidSuppFeatureDigColorEncYCrCb444(E) |
| Check if digital YCrCb 4:4:4 color encoding supported. More... | |
| #define | XVidC_EdidSuppFeatureDigColorEncYCrCb422(E) |
| Check if digital YCrCb 4:2:2 color encoding supported. More... | |
| #define | XVidC_EdidIsFeatureSrgbDef(E) |
| Check if sRGB is default color space. More... | |
| #define | XVidC_EdidIsFeaturePtmInc(E) |
| Check if preferred timing mode included. More... | |
| #define | XVidC_EdidIsFeatureContFreq(E) |
| Check if continuous frequency operation supported. More... | |
| #define | XVidC_EdidSuppEstTimings720x400_70(E) |
| Check if 720x400 @ 70Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings720x400_88(E) |
| Check if 720x400 @ 88Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings640x480_60(E) |
| Check if 640x480 @ 60Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings640x480_67(E) |
| Check if 640x480 @ 67Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings640x480_72(E) |
| Check if 640x480 @ 72Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings640x480_75(E) |
| Check if 640x480 @ 75Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings800x600_56(E) |
| Check if 800x600 @ 56Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings800x600_60(E) |
| Check if 800x600 @ 60Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings800x600_72(E) |
| Check if 800x600 @ 72Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings800x600_75(E) |
| Check if 800x600 @ 75Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings832x624_75(E) |
| Check if 832x624 @ 75Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1024x768_87(E) |
| Check if 1024x768 @ 87Hz interlaced timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1024x768_60(E) |
| Check if 1024x768 @ 60Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1024x768_70(E) |
| Check if 1024x768 @ 70Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1024x768_75(E) |
| Check if 1024x768 @ 75Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1280x1024_75(E) |
| Check if 1280x1024 @ 75Hz timing supported. More... | |
| #define | XVidC_EdidSuppEstTimings1152x870_75(E) |
| Check if 1152x870 @ 75Hz manufacturer timing supported. More... | |
| #define | XVidC_EdidGetTimingsMan(E) (E[XVIDC_EDID_EST_TIMINGS_MAN] & XVIDC_EDID_EST_TIMINGS_MAN_MASK) |
| Get manufacturer-specific established timings. More... | |
| #define | XVidC_EdidGetStdTimingsH(E, N) ((E[XVIDC_EDID_STD_TIMINGS_H(N)] + 31) * 8) |
| Get standard timing horizontal resolution. More... | |
| #define | XVidC_EdidGetStdTimingsAr(E, N) (E[XVIDC_EDID_STD_TIMINGS_AR_FRR(N)] >> XVIDC_EDID_STD_TIMINGS_AR_SHIFT) |
| Get standard timing aspect ratio. More... | |
| #define | XVidC_EdidGetStdTimingsFrr(E, N) |
| Get standard timing field refresh rate. More... | |
| #define | XVidC_EdidIsDtdPtmInterlaced(E) |
| Check if DTD/PTM uses interlaced scan. More... | |
| #define | XVidC_EdidGetExtBlkCount(E) (E[XVIDC_EDID_EXT_BLK_COUNT]) |
| Get number of EDID extension blocks. More... | |
| #define | XVidC_EdidGetChecksum(E) (E[XVIDC_EDID_CHECKSUM]) |
| Get EDID base block checksum. More... | |
Address mapping for the base EDID block. | |
| #define | XVIDC_EDID_HEADER 0x00 |
| EDID header field offset. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME0 0x08 |
| Vendor/product ID manufacturer name byte 0 offset. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME1 0x09 |
| Vendor/product ID manufacturer name byte 1 offset. More... | |
| #define | XVIDC_EDID_VPI_ID_PROD_CODE_LSB 0x0A |
| Vendor/product ID product code LSB offset. More... | |
| #define | XVIDC_EDID_VPI_ID_PROD_CODE_MSB 0x0B |
| Vendor/product ID product code MSB offset. More... | |
| #define | XVIDC_EDID_VPI_ID_SN0 0x0C |
| Vendor/product ID serial number byte 0 offset. More... | |
| #define | XVIDC_EDID_VPI_ID_SN1 0x0D |
| Vendor/product ID serial number byte 1 offset. More... | |
| #define | XVIDC_EDID_VPI_ID_SN2 0x0E |
| Vendor/product ID serial number byte 2 offset. More... | |
| #define | XVIDC_EDID_VPI_ID_SN3 0x0F |
| Vendor/product ID serial number byte 3 offset. More... | |
| #define | XVIDC_EDID_VPI_WEEK_MAN 0x10 |
| Vendor/product ID week of manufacture offset. More... | |
| #define | XVIDC_EDID_VPI_YEAR 0x11 |
| Vendor/product ID year of manufacture/model offset. More... | |
| #define | XVIDC_EDID_STRUCT_VER 0x12 |
| EDID structure version number offset. More... | |
| #define | XVIDC_EDID_STRUCT_REV 0x13 |
| EDID structure revision number offset. More... | |
| #define | XVIDC_EDID_BDISP_VID 0x14 |
| Basic display video input definition offset. More... | |
| #define | XVIDC_EDID_BDISP_H_SSAR 0x15 |
| Basic display horizontal screen size or aspect ratio offset. More... | |
| #define | XVIDC_EDID_BDISP_V_SSAR 0x16 |
| Basic display vertical screen size or aspect ratio offset. More... | |
| #define | XVIDC_EDID_BDISP_GAMMA 0x17 |
| Basic display gamma offset. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE 0x18 |
| Basic display feature support offset. More... | |
| #define | XVIDC_EDID_CC_RG_LOW 0x19 |
| Color characteristics red/green low bits offset. More... | |
| #define | XVIDC_EDID_CC_BW_LOW 0x1A |
| Color characteristics blue/white low bits offset. More... | |
| #define | XVIDC_EDID_CC_REDX_HIGH 0x1B |
| Color characteristics red X high bits offset. More... | |
| #define | XVIDC_EDID_CC_REDY_HIGH 0x1C |
| Color characteristics red Y high bits offset. More... | |
| #define | XVIDC_EDID_CC_GREENX_HIGH 0x1D |
| Color characteristics green X high bits offset. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I 0x23 |
| Established timings I offset. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II 0x24 |
| Established timings II offset. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_MAN 0x25 |
| Manufacturer established timings offset. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_H(N) (0x26 + 2 * (N - 1)) |
| Standard timing horizontal resolution offset (N=1-8) More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_FRR(N) (0x27 + 2 * (N - 1)) |
| Standard timing aspect ratio and field refresh rate offset (N=1-8) More... | |
| #define | XVIDC_EDID_18BYTE_DESCRIPTOR(N) (0x36 + 18 * (N - 1)) |
| 18-byte descriptor block offset (N=1-4) More... | |
| #define | XVIDC_EDID_PTM (XVIDC_EDID_18BYTE_DESCRIPTOR(1)) |
| Preferred timing mode offset (first 18-byte descriptor) More... | |
| #define | XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_LSB 0x00 |
| DTD/PTM pixel clock in kHz LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_MSB 0x01 |
| DTD/PTM pixel clock in kHz MSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HRES_LSB 0x02 |
| DTD/PTM horizontal addressable pixels LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HBLANK_LSB 0x03 |
| DTD/PTM horizontal blanking pixels LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HRES_HBLANK_U4 0x04 |
| DTD/PTM horizontal res/blanking upper 4 bits offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VRES_LSB 0x05 |
| DTD/PTM vertical addressable lines LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VBLANK_LSB 0x06 |
| DTD/PTM vertical blanking lines LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VRES_VBLANK_U4 0x07 |
| DTD/PTM vertical res/blanking upper 4 bits offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HFPORCH_LSB 0x08 |
| DTD/PTM horizontal front porch pixels LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HSPW_LSB 0x09 |
| DTD/PTM horizontal sync pulse width LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4 0x0A |
| DTD/PTM vertical front porch and sync pulse width lower 4 bits offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2 0x0B |
| DTD/PTM horizontal/vertical front porch and sync pulse width upper 2 bits offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HIMGSIZE_MM_LSB 0x0C |
| DTD/PTM horizontal display size in mm LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VIMGSIZE_MM_LSB 0x0D |
| DTD/PTM vertical display size in mm LSB offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4 0x0E |
| DTD/PTM horizontal/vertical display size upper 4 bits offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_HBORDER 0x0F |
| DTD/PTM horizontal border pixels offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_VBORDER 0x10 |
| DTD/PTM vertical border lines offset. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL 0x11 |
| DTD/PTM signal features offset. More... | |
| #define | XVIDC_EDID_EXT_BLK_COUNT 0x7E |
| Extension block count offset. More... | |
| #define | XVIDC_EDID_CHECKSUM 0x7F |
| EDID checksum offset. More... | |
Extended Display Identification Data: Masks, shifts, and values. | |
| #define | XVIDC_EDID_CC_GREENY_HIGH 0x1E |
| Color characteristics green Y high bits offset. More... | |
| #define | XVIDC_EDID_CC_BLUEX_HIGH 0x1F |
| Color characteristics blue X high bits offset. More... | |
| #define | XVIDC_EDID_CC_BLUEY_HIGH 0x20 |
| Color characteristics blue Y high bits offset. More... | |
| #define | XVIDC_EDID_CC_WHITEX_HIGH 0x21 |
| Color characteristics white X high bits offset. More... | |
| #define | XVIDC_EDID_CC_WHITEY_HIGH 0x22 |
| Color characteristics white Y high bits offset. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_SHIFT 2 |
| Manufacturer name character 0 bit shift. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_MASK (0x1F << 2) |
| Manufacturer name character 0 bit mask. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_MASK 0x03 |
| Manufacturer name character 1 low bits mask. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_POS 3 |
| Manufacturer name character 1 bit position. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR1_SHIFT 5 |
| Manufacturer name character 1 high bits shift. More... | |
| #define | XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR2_MASK 0x1F |
| Manufacturer name character 2 bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_VSI_SHIFT 7 |
| Video signal interface bit shift. More... | |
| #define | XVIDC_EDID_BDISP_VID_VSI_MASK (0x01 << 7) |
| Video signal interface bit mask (0=analog, 1=digital) More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT 5 |
| Analog signal level standard bit shift. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_MASK (0x03 << 5) |
| Analog signal level standard bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0300_1000 0x0 |
| Analog signal level 0.700/0.300/1.000 V. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_0714_0286_1000 0x1 |
| Analog signal level 0.714/0.286/1.000 V. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_1000_0400_1400 0x2 |
| Analog signal level 1.000/0.400/1.400 V. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0000_0700 0x3 |
| Analog signal level 0.700/0.000/0.700 V. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK (0x01 << 4) |
| Analog blank-to-black setup expected bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK (0x01 << 3) |
| Analog separate sync H and V signals supported bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK (0x01 << 2) |
| Analog composite sync signal on H bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK (0x01 << 1) |
| Analog composite sync signal on green bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK (0x01) |
| Analog serration on V sync pulse bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_SHIFT 4 |
| Digital bits per color bit shift. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_MASK (0x7 << 4) |
| Digital bits per color bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_UNDEF 0x0 |
| Digital bits per color undefined. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_6 0x1 |
| Digital 6 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_8 0x2 |
| Digital 8 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_10 0x3 |
| Digital 10 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_12 0x4 |
| Digital 12 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_14 0x5 |
| Digital 14 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_BPC_16 0x6 |
| Digital 16 bits per color. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_MASK 0xF |
| Digital video interface standard bit mask. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_UNDEF 0x0 |
| Digital video interface standard undefined. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_DVI 0x1 |
| Digital video interface standard DVI. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIA 0x2 |
| Digital video interface standard HDMI-A. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIB 0x3 |
| Digital video interface standard HDMI-B. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_MDDI 0x4 |
| Digital video interface standard MDDI. More... | |
| #define | XVIDC_EDID_BDISP_VID_DIG_VIS_DP 0x5 |
| Digital video interface standard DisplayPort. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_PM_STANDBY_MASK (0x1 << 7) |
| Feature support standby power management bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_PM_SUSPEND_MASK (0x1 << 6) |
| Feature support suspend power management bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_PM_OFF_VLP_MASK (0x1 << 5) |
| Feature support active-off/very low power bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_SHIFT 3 |
| Feature support analog display color type bit shift. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MASK (0x3 << 3) |
| Feature support analog display color type bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MCG 0x0 |
| Analog display color type monochrome/grayscale. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_RGB 0x1 |
| Analog display color type RGB color. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_NRGB 0x2 |
| Analog display color type non-RGB color. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_UNDEF 0x3 |
| Analog display color type undefined. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB444_MASK (0x1 << 3) |
| Feature support digital YCrCb 4:4:4 color encoding bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB422_MASK (0x1 << 4) |
| Feature support digital YCrCb 4:2:2 color encoding bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_SRGB_DEF_MASK (0x1 << 2) |
| Feature support sRGB is default color space bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_PTM_INC_MASK (0x1 << 1) |
| Feature support preferred timing mode included bit mask. More... | |
| #define | XVIDC_EDID_BDISP_FEATURE_CONTFREQ_MASK (0x1) |
| Feature support continuous frequency operation bit mask. More... | |
| #define | XVIDC_EDID_CC_HIGH_SHIFT 2 |
| Color characteristics high bits shift value. More... | |
| #define | XVIDC_EDID_CC_RBX_LOW_SHIFT 6 |
| Red/Blue X coordinate low bits shift. More... | |
| #define | XVIDC_EDID_CC_RBY_LOW_SHIFT 4 |
| Red/Blue Y coordinate low bits shift. More... | |
| #define | XVIDC_EDID_CC_RBY_LOW_MASK (0x3 << 4) |
| Red/Blue Y coordinate low bits mask. More... | |
| #define | XVIDC_EDID_CC_GWX_LOW_SHIFT 2 |
| Green/White X coordinate low bits shift. More... | |
| #define | XVIDC_EDID_CC_GWX_LOW_MASK (0x3 << 2) |
| Green/White X coordinate low bits mask. More... | |
| #define | XVIDC_EDID_CC_GWY_LOW_MASK (0x3) |
| Green/White Y coordinate low bits mask. More... | |
| #define | XVIDC_EDID_CC_GREENY_HIGH 0x1E |
| Color characteristics green Y high bits offset. More... | |
| #define | XVIDC_EDID_CC_BLUEX_HIGH 0x1F |
| Color characteristics blue X high bits offset. More... | |
| #define | XVIDC_EDID_CC_BLUEY_HIGH 0x20 |
| Color characteristics blue Y high bits offset. More... | |
| #define | XVIDC_EDID_CC_WHITEX_HIGH 0x21 |
| Color characteristics white X high bits offset. More... | |
| #define | XVIDC_EDID_CC_WHITEY_HIGH 0x22 |
| Color characteristics white Y high bits offset. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_720x400_70_MASK (0x1 << 7) |
| Established timing: 720x400 @ 70Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_720x400_88_MASK (0x1 << 6) |
| Established timing: 720x400 @ 88Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_640x480_60_MASK (0x1 << 5) |
| Established timing: 640x480 @ 60Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_640x480_67_MASK (0x1 << 4) |
| Established timing: 640x480 @ 67Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_640x480_72_MASK (0x1 << 3) |
| Established timing: 640x480 @ 72Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_640x480_75_MASK (0x1 << 2) |
| Established timing: 640x480 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_800x600_56_MASK (0x1 << 1) |
| Established timing: 800x600 @ 56Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_I_800x600_60_MASK (0x1) |
| Established timing: 800x600 @ 60Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_800x600_72_MASK (0x1 << 7) |
| Established timing: 800x600 @ 72Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_800x600_75_MASK (0x1 << 6) |
| Established timing: 800x600 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_832x624_75_MASK (0x1 << 5) |
| Established timing: 832x624 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_1024x768_87_MASK (0x1 << 4) |
| Established timing: 1024x768 @ 87Hz interlaced bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_1024x768_60_MASK (0x1 << 3) |
| Established timing: 1024x768 @ 60Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_1024x768_70_MASK (0x1 << 2) |
| Established timing: 1024x768 @ 70Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_1024x768_75_MASK (0x1 << 1) |
| Established timing: 1024x768 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_II_1280x1024_75_MASK (0x1) |
| Established timing: 1280x1024 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_MAN_1152x870_75_MASK (0x1 << 7) |
| Manufacturer established timing: 1152x870 @ 75Hz bit mask. More... | |
| #define | XVIDC_EDID_EST_TIMINGS_MAN_MASK (0x7F) |
| Manufacturer established timings bit mask. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_SHIFT 6 |
| Standard timings aspect ratio bit shift. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_16_10 0x0 |
| Standard timing aspect ratio: 16:10. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_4_3 0x1 |
| Standard timing aspect ratio: 4:3. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_5_4 0x2 |
| Standard timing aspect ratio: 5:4. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_AR_16_9 0x3 |
| Standard timing aspect ratio: 16:9. More... | |
| #define | XVIDC_EDID_STD_TIMINGS_FRR_MASK (0x3F) |
| Standard timings field refresh rate bit mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XBLANK_MASK 0x0F |
| DTD/PTM horizontal/vertical resolution and blanking upper 4 bits: blanking mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_MASK 0xF0 |
| DTD/PTM horizontal/vertical resolution and blanking upper 4 bits: resolution mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_SHIFT 4 |
| DTD/PTM horizontal/vertical resolution and blanking upper 4 bits: resolution shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VSPW_MASK 0x0F |
| DTD/PTM vertical front porch and sync pulse width lower 4 bits: sync pulse width mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_MASK 0xF0 |
| DTD/PTM vertical front porch and sync pulse width lower 4 bits: front porch mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_SHIFT 4 |
| DTD/PTM vertical front porch and sync pulse width lower 4 bits: front porch shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_MASK 0xC0 |
| DTD/PTM horizontal front porch upper 2 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_MASK 0x30 |
| DTD/PTM horizontal sync pulse width upper 2 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_MASK 0x0C |
| DTD/PTM vertical front porch upper 2 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VSPW_MASK 0x03 |
| DTD/PTM vertical sync pulse width upper 2 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_SHIFT 6 |
| DTD/PTM horizontal front porch upper 2 bits shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_SHIFT 4 |
| DTD/PTM horizontal sync pulse width upper 2 bits shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_SHIFT 2 |
| DTD/PTM vertical front porch upper 2 bits shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_VIMGSIZE_MM_MASK 0x0F |
| DTD/PTM vertical image size upper 4 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_MASK 0xF0 |
| DTD/PTM horizontal image size upper 4 bits mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_SHIFT 4 |
| DTD/PTM horizontal image size upper 4 bits shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_MASK 0x80 |
| DTD/PTM interlaced bit mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_SHIFT 7 |
| DTD/PTM interlaced bit shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_MASK 0x02 |
| DTD/PTM horizontal polarity bit mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_MASK 0x04 |
| DTD/PTM vertical polarity bit mask. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_SHIFT 1 |
| DTD/PTM horizontal polarity bit shift. More... | |
| #define | XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_SHIFT 2 |
| DTD/PTM vertical polarity bit shift. More... | |
Functions | |
| void | XVidC_EdidGetManName (const u8 *EdidRaw, char ManName[4]) |
| Get the manufacturer name as specified in the vendor and product ID field of the supplied base Extended Display Identification Data (EDID). More... | |
| XVidC_ColorDepth | XVidC_EdidGetColorDepth (const u8 *EdidRaw) |
| Get the color bit depth (bits per primary color) as specified in the basic display parameters and features, video input definition field of the supplied base Extended Display Identification Data (EDID). More... | |
| int | XVidC_EdidGetCcRedX (const u8 *EdidRaw) |
| Calculates the x chromaticity coordinate for red by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcRedY (const u8 *EdidRaw) |
| Calculates the y chromaticity coordinate for red by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcGreenX (const u8 *EdidRaw) |
| Calculates the x chromaticity coordinate for green by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcGreenY (const u8 *EdidRaw) |
| Calculates the y chromaticity coordinate for green by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcBlueX (const u8 *EdidRaw) |
| Calculates the x chromaticity coordinate for blue by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcBlueY (const u8 *EdidRaw) |
| Calculates the y chromaticity coordinate for blue by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcWhiteX (const u8 *EdidRaw) |
| Calculates the x chromaticity coordinate for white by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to a integer in Q0.10 Format. More... | |
| int | XVidC_EdidGetCcWhiteY (const u8 *EdidRaw) |
| Calculates the y chromaticity coordinate for white by converting a 10 bit binary fraction representation from the supplied base Extended Display Identification Data (EDID) to an integer in Q0.10 Format. More... | |
| u16 | XVidC_EdidGetStdTimingsV (const u8 *EdidRaw, u8 StdTimingsNum) |
| Retrieves the active vertical resolution from the standard timings field of the supplied base Extended Display Identification Data (EDID). More... | |
| u32 | XVidC_EdidIsVideoTimingSupported (const u8 *EdidRaw, const XVidC_VideoTimingMode *VtMode) |
| Checks whether or not a specified video timing mode is supported as specified in the supplied base Extended Display Identification Data (EDID). More... | |