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v_gamma_lut
Vitis Drivers API Documentation
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#include "xparameters.h"#include "sleep.h"#include "xv_gamma_lut.h"#include "xv_tpg.h"#include "xvtc.h"#include "xvidc.h"Macros | |
| #define | VideoClockGen_WriteReg(RegOffset, Data) Xil_Out32((XPAR_VIDEO_CLK_WIZ_BASEADDR) + (RegOffset), (u32)(Data)) |
| Writes a value to the Video Clock Generator register. More... | |
| #define | VideoClockGen_ReadReg(RegOffset) Xil_In32((XPAR_VIDEO_CLK_WIZ_BASEADDR) + (RegOffset)) |
| Reads a value from the Video Clock Generator register. More... | |
Functions | |
| int | driverInit () |
| Initializes video pipeline IP drivers. More... | |
| void | videoIpConfig (XVidC_VideoMode videoMode) |
| Configures video IP cores for the specified video mode. More... | |
| int | videoClockConfig (XVidC_VideoMode videoMode) |
| Configures the video clock generator for the specified video mode. More... | |
| void | resetIp (void) |
| Resets all video processing IP cores. More... | |
| int | main () |
| Main test application for Gamma LUT video pipeline. More... | |
| #define VideoClockGen_ReadReg | ( | RegOffset | ) | Xil_In32((XPAR_VIDEO_CLK_WIZ_BASEADDR) + (RegOffset)) |
Reads a value from the Video Clock Generator register.
Referenced by videoClockConfig().
| #define VideoClockGen_WriteReg | ( | RegOffset, | |
| Data | |||
| ) | Xil_Out32((XPAR_VIDEO_CLK_WIZ_BASEADDR) + (RegOffset), (u32)(Data)) |
Writes a value to the Video Clock Generator register.
Referenced by videoClockConfig().
| int driverInit | ( | ) |
Initializes video pipeline IP drivers.
This function initializes the VTC (Video Timing Controller), TPG (Test Pattern Generator), and Gamma LUT IP cores by looking up their configurations and performing configuration initialization.
References XV_gamma_lut_Config::BaseAddress, XV_gamma_lut_CfgInitialize(), and XV_gamma_lut_LookupConfig().
Referenced by main().
| int main | ( | ) |
Main test application for Gamma LUT video pipeline.
This function tests the video pipeline with Gamma LUT processing across multiple video resolutions (1080p60, 4K30, 4K60) based on the hardware capabilities. It initializes all IP drivers, configures the video clock and IP cores for each test mode, and verifies video lock status.
References driverInit(), resetIp(), videoClockConfig(), and videoIpConfig().
| void resetIp | ( | void | ) |
Resets all video processing IP cores.
This function performs a hardware reset of all video IP cores in the pipeline by asserting the reset signal, waiting for stabilization, then releasing the reset signal.
Referenced by main().
| int videoClockConfig | ( | XVidC_VideoMode | videoMode | ) |
Configures the video clock generator for the specified video mode.
This function programs the Video Clock Wizard IP to generate the appropriate pixel clock frequency for the requested video mode. It configures the PLL parameters (dividers, multipliers, and fractional values) based on the video resolution and pixels-per-clock setting, then waits for PLL lock.
| videoMode | The video mode identifier (e.g., 1080p60, 4K30, 4K60). |
References VideoClockGen_ReadReg, and VideoClockGen_WriteReg.
Referenced by main().
| void videoIpConfig | ( | XVidC_VideoMode | videoMode | ) |
Configures video IP cores for the specified video mode.
This function configures the TPG (Test Pattern Generator), Gamma LUT, and VTC (Video Timing Controller) for the specified video resolution and timing. It sets up the frame dimensions, color format, pattern type, and timing parameters based on the requested video mode.
| videoMode | The video mode identifier (e.g., 1080p60, 4K30, 4K60). |
References XV_gamma_lut_EnableAutoRestart(), XV_gamma_lut_Set_HwReg_height(), XV_gamma_lut_Set_HwReg_video_format(), XV_gamma_lut_Set_HwReg_width(), and XV_gamma_lut_Start().
Referenced by main().