export interface VdpRegisterWrite { register: number; value: number; } export interface VramWrite { value: number; } /** Standard TMS9918 VRAM layout for Graphics II (Screen 2) */ export declare const TMS9918_LAYOUT: { readonly PNT: 6144; readonly PGT: 0; readonly CT: 8192; readonly SAT: 6912; readonly SPT: 14336; }; /** SAT entry layout: Y, X, pattern, color — 4 bytes each, 32 entries */ export interface SatEntry { y: number; x: number; pattern: number; color: number; } /** * Captures writes to TMS9918 VDP ports and maintains a 16KB VRAM buffer. * * VDP register write protocol (control port): * 1st write: data byte (value) * 2nd write: register number | 0x80 */ export declare class Tms9918 { private regWrites; private vramWrites; private pendingByte; /** 16KB VRAM buffer — populated by BIOS hooks and port writes */ vram: Uint8Array; /** Handle a write to the VDP control port */ writeControl(value: number): void; /** Handle a write to the VDP data port */ writeData(value: number): void; /** Handle a read from the VDP data port */ readData(): number; /** Handle a read from the VDP status port */ readStatus(): number; /** Write a byte to the VRAM buffer (called by BIOS hooks) */ writeVram(addr: number, value: number): void; /** Read a byte from the VRAM buffer */ readVram(addr: number): number; /** Write a block of data to the VRAM buffer */ writeVramBlock(addr: number, data: Uint8Array | number[], len: number): void; /** Fill a VRAM region with a byte value */ fillVram(addr: number, value: number, len: number): void; /** Read a SAT entry (4 bytes: Y, X, pattern, color) */ readSatEntry(index: number): SatEntry; /** Read a tile index from the Pattern Name Table */ readPntTile(col: number, row: number): number; getRegisterWrites(): VdpRegisterWrite[]; getVramWrites(): VramWrite[]; clear(): void; /** Clear VRAM buffer and all recorded writes */ clearAll(): void; } //# sourceMappingURL=tms9918.d.ts.map