1 .include "global.s" 0001 1 .NEAR_CALLS = 1 ; - tag so that sed can change this 2 3 ;; Changed by astorgb.pl to 1 0000 4 __RGBDS__ = 0 5 6 7 ;; Screen dimensions 0013 8 .MAXCURSPOSX = 0x13 ; In tiles 0011 9 .MAXCURSPOSY = 0x11 10 0080 11 .START = 0x80 0040 12 .SELECT = 0x40 0020 13 .B = 0x20 0010 14 .A = 0x10 0008 15 .DOWN = 0x08 0004 16 .UP = 0x04 0002 17 .LEFT = 0x02 0001 18 .RIGHT = 0x01 19 00A0 20 .SCREENWIDTH = 0xA0 0090 21 .SCREENHEIGHT = 0x90 0007 22 .MINWNDPOSX = 0x07 0000 23 .MINWNDPOSY = 0x00 00A6 24 .MAXWNDPOSX = 0xA6 008F 25 .MAXWNDPOSY = 0x8F 26 0001 27 .VBL_IFLAG = 0x01 0002 28 .LCD_IFLAG = 0x02 0004 29 .TIM_IFLAG = 0x04 0008 30 .SIO_IFLAG = 0x08 0010 31 .JOY_IFLAG = 0x10 32 0000 33 .P1 = 0x00 ; Joystick: 1.1.P15.P14.P13.P12.P11.P10 0001 34 .SB = 0x01 ; Serial IO data buffer 0002 35 .SC = 0x02 ; Serial IO control register 0004 36 .DIV = 0x04 ; Divider register 0005 37 .TIMA = 0x05 ; Timer counter 0006 38 .TMA = 0x06 ; Timer modulo 0007 39 .TAC = 0x07 ; Timer control 000F 40 .IF = 0x0F ; Interrupt flags: 0.0.0.JST.SIO.TIM.LCD.VBL 0010 41 .NR10 = 0x10 ; Sound register 0011 42 .NR11 = 0x11 ; Sound register 0012 43 .NR12 = 0x12 ; Sound register 0013 44 .NR13 = 0x13 ; Sound register 0014 45 .NR14 = 0x14 ; Sound register 0016 46 .NR21 = 0x16 ; Sound register 0017 47 .NR22 = 0x17 ; Sound register 0018 48 .NR23 = 0x18 ; Sound register 0019 49 .NR24 = 0x19 ; Sound register 001A 50 .NR30 = 0x1A ; Sound register 001B 51 .NR31 = 0x1B ; Sound register 001C 52 .NR32 = 0x1C ; Sound register 001D 53 .NR33 = 0x1D ; Sound register 001E 54 .NR34 = 0x1E ; Sound register 0020 55 .NR41 = 0x20 ; Sound register 0021 56 .NR42 = 0x21 ; Sound register 0022 57 .NR43 = 0x22 ; Sound register 0023 58 .NR44 = 0x23 ; Sound register 0024 59 .NR50 = 0x24 ; Sound register 0025 60 .NR51 = 0x25 ; Sound register 0026 61 .NR52 = 0x26 ; Sound register 0040 62 .LCDC = 0x40 ; LCD control 0041 63 .STAT = 0x41 ; LCD status 0042 64 .SCY = 0x42 ; Scroll Y 0043 65 .SCX = 0x43 ; Scroll X 0044 66 .LY = 0x44 ; LCDC Y-coordinate 0045 67 .LYC = 0x45 ; LY compare 0046 68 .DMA = 0x46 ; DMA transfer 0047 69 .BGP = 0x47 ; BG palette data 0048 70 .OBP0 = 0x48 ; OBJ palette 0 data 0049 71 .OBP1 = 0x49 ; OBJ palette 1 data 004A 72 .WY = 0x4A ; Window Y coordinate 004B 73 .WX = 0x4B ; Window X coordinate 004D 74 .KEY1 = 0x4D ; CPU speed 004F 75 .VBK = 0x4F ; VRAM bank 0051 76 .HDMA1 = 0x51 ; DMA control 1 0052 77 .HDMA2 = 0x52 ; DMA control 2 0053 78 .HDMA3 = 0x53 ; DMA control 3 0054 79 .HDMA4 = 0x54 ; DMA control 4 0055 80 .HDMA5 = 0x55 ; DMA control 5 0056 81 .RP = 0x56 ; IR port 0068 82 .BCPS = 0x68 ; BG color palette specification 0069 83 .BCPD = 0x69 ; BG color palette data 006A 84 .OCPS = 0x6A ; OBJ color palette specification 006B 85 .OCPD = 0x6B ; OBJ color palette data 0070 86 .SVBK = 0x70 ; WRAM bank 00FF 87 .IE = 0xFF ; Interrupt enable 88 0001 89 .G_MODE = 0x01 ; Graphic mode 0002 90 .T_MODE = 0x02 ; Text mode (bit 2) 0002 91 .T_MODE_OUT = 0x02 ; Text mode output only 0003 92 .T_MODE_INOUT = 0x03 ; Text mode with input 0004 93 .M_NO_SCROLL = 0x04 ; Disables scrolling of the screen in text mode 0008 94 .M_NO_INTERP = 0x08 ; Disables special character interpretation 95 2000 96 .MBC1_ROM_PAGE = 0x2000 ; Address to write to for MBC1 switching 97 98 ;; Status codes for IO 0000 99 .IO_IDLE = 0x00 0001 100 .IO_SENDING = 0x01 0002 101 .IO_RECEIVING = 0x02 0004 102 .IO_ERROR = 0x04 103 104 ;; Type of IO data 0066 105 .DT_IDLE = 0x66 0055 106 .DT_RECEIVING = 0x55 107 108 ;; Table of routines for modes 01E0 109 .MODE_TABLE = 0x01E0 110 111 ;; C related 112 ;; Overheap of a banked call. Used for parameters 113 ;; = ret + real ret + bank 114 0001 115 .if .NEAR_CALLS 0002 116 .BANKOV = 2 117 118 .else 119 .BANKOV = 6 120 121 .endif 122 123 .globl banked_call 124 .globl banked_ret 125 126 ;; Global variables 127 .globl .mode 128 129 .globl __cpu 130 131 .globl __io_out 132 .globl __io_in 133 .globl __io_status 134 135 ;; Global routines 136 .globl .set_mode 137 138 .globl .reset 139 140 .globl .display_off 141 142 .globl .wait_vbl_done 143 144 ;; Interrupt routines 145 .globl .add_VBL 146 .globl .add_LCD 147 .globl .add_TIM 148 .globl .add_SIO 149 .globl .add_JOY 150 151 ;; Symbols defined at link time 152 .globl .STACK 153 .globl .OAM 154 .globl .refresh_OAM 155 156 ;; Initialization routine 157 .globl .init 158 159 ;; Main user routine 160 .globl _main 2 3 ;; BANKED: checked, imperfect 4 .area _BASE 5 6 ;; Delay DE milliseconds 7 ;; 8 ;; Entry conditions 9 ;; DE = number of milliseconds to delay (1 to 65536, 0 = 65536) 10 ;; 11 ;; Register used: AF, DE 0418 12 .CPMS = 4194/4 ; 4.194304 MHz 0000 13 .delay:: ; 6 cycles for the CALL 0000 C5 14 PUSH BC ; 4 cycles 0001 CDr1Ds00 15 CALL .dly ; 12 cycles to return from .dly (6+1+5) 0004 06 32 16 LD B,#.CPMS/20-2 ; 2 cycles 17 ; ========= 18 ; 24 cycles 0006 19 .ldlp: 0006 18 00 20 JR 1$ ; 3 cycles 0008 18 00 21 1$: JR 2$ ; 3 cycles 000A 18 00 22 2$: JR 3$ ; 3 cycles 000C 18 00 23 3$: JR 4$ ; 3 cycles 000E 18 00 24 4$: JR 5$ ; 3 cycles 0010 05 25 5$: DEC B ; 1 cycles 0011 C2r06s00 26 JP NZ,.ldlp ; 3 cycles (if TRUE: 4 cycles) 0014 00 27 NOP ; 1 cycles 28 ; ========= 29 ; 20 cycles 30 ;; Exit in 16 cycles 0015 C1 31 POP BC ; 3 cycles 0016 18 00 32 JR 6$ ; 3 cycles 0018 18 00 33 6$: JR 7$ ; 3 cycles 001A 18 00 34 7$: JR 8$ ; 3 cycles 001C C9 35 8$: RET ; 4 cycles 36 ; ========= 37 ; 16 cycles 38 39 ;; Delay all but last millisecond 001D 40 .dly: 001D 1B 41 DEC DE ; 2 cycles 001E 7B 42 LD A,E ; 1 cycles 001F B2 43 OR D ; 1 cycles 0020 C8 44 RET Z ; 2 cycles (upon return: 5 cycles) 0021 06 33 45 LD B,#.CPMS/20-1 ; 2 cycles 46 ; ========= 47 ; 8 cycles 0023 48 .dlp: 0023 18 00 49 JR 1$ ; 3 cycles 0025 18 00 50 1$: JR 2$ ; 3 cycles 0027 18 00 51 2$: JR 3$ ; 3 cycles 0029 18 00 52 3$: JR 4$ ; 3 cycles 002B 18 00 53 4$: JR 5$ ; 3 cycles 002D 05 54 5$: DEC B ; 1 cycles 002E C2r23s00 55 JP NZ,.dlp ; 3 cycles (if TRUE: 4 cycles) 0031 00 56 NOP ; 1 cycles 57 ; ========= 58 ; 20 cycles 59 ;; Exit in 15 cycles 0032 18 00 60 JR 6$ ; 3 cycles 0034 18 00 61 6$: JR 7$ ; 3 cycles 0036 18 00 62 7$: JR 8$ ; 3 cycles 0038 18 E3 63 8$: JR .dly ; 3 cycles 64 ; ========= 65 ; 12 cycles 66 003A 67 _delay:: 003A F8 02 68 LDA HL,2(SP) ; Skip return address 003C 5E 69 LD E,(HL) ; DE = delay 003D 23 70 INC HL 003E 56 71 LD D,(HL) 003F CDr00s00 72 CALL .delay 0042 C9 73 RET