import * as t from "io-ts"; //#region generated/ChipDP3230RGBVExtendProperty.d.ts declare const ChipDP3230RGBVExtendPropertyBase: t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ IsOpenChannelCheck: t.Type; }>, t.PartialC<{ RedFirstReg1: t.Type; GreenFirstReg1: t.Type; BlueFirstReg1: t.Type; VRedFirstReg1: t.Type; RedFirstReg2: t.Type; GreenFirstReg2: t.Type; BlueFirstReg2: t.Type; VRedFirstReg2: t.Type; IsUseNewModule: t.Type; FirstDataLen: t.Type; FirstStartIndex: t.Type; FirstRegisterAddr: t.Type; ThirdDataLen: t.Type; ThirdDataStartIndex: t.Type; ThirdRegisterAddr: t.Type; IsAdvancedMode: t.Type; VsCorner: t.Type; GlckSet: t.Type; DisshdEn: t.Type; PwmAdd: t.Type; PwmOpt: t.Type; PowerSavePd: t.Type; RZ_T1H: t.Type; RZ_T0H: t.Type; RZ_DCLK: t.Type; }>]>; /** * Codec for {@link ChipDP3230RGBVExtendProperty} * @category Codecs * @see Automatically generated from ../decompiled/Nova.LCT.GigabitSystem.ChipDP3230.decompiled.cs:831 */ declare const ChipDP3230RGBVExtendProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ IsOpenChannelCheck: t.Type; }>, t.PartialC<{ RedFirstReg1: t.Type; GreenFirstReg1: t.Type; BlueFirstReg1: t.Type; VRedFirstReg1: t.Type; RedFirstReg2: t.Type; GreenFirstReg2: t.Type; BlueFirstReg2: t.Type; VRedFirstReg2: t.Type; IsUseNewModule: t.Type; FirstDataLen: t.Type; FirstStartIndex: t.Type; FirstRegisterAddr: t.Type; ThirdDataLen: t.Type; ThirdDataStartIndex: t.Type; ThirdRegisterAddr: t.Type; IsAdvancedMode: t.Type; VsCorner: t.Type; GlckSet: t.Type; DisshdEn: t.Type; PwmAdd: t.Type; PwmOpt: t.Type; PowerSavePd: t.Type; RZ_T1H: t.Type; RZ_T0H: t.Type; RZ_DCLK: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipDP3230RGBVExtendProperty">; }>]>; interface ChipDP3230RGBVExtendProperty extends t.TypeOf {} //#endregion export { ChipDP3230RGBVExtendPropertyBase as n, ChipDP3230RGBVExtendProperty as t }; //# sourceMappingURL=ChipDP3230RGBVExtendProperty-D2_6l4SJ.d.mts.map