import { t as ChipCNS7263ExtendProperty } from "./ChipCNS7263ExtendProperty-Cg88q2pj.mjs"; import * as t from "io-ts"; //#region generated/ChipCNS7263RGBVExtendProperty.d.ts declare const ChipCNS7263RGBVExtendPropertyBase: t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; IsAdvancedMode: t.Type; MTTime: t.Type; }>, t.PartialC<{ RedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; GreenProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; BlueProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; VRedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; IsUseNewModule: t.Type; IsStarSwipPoint: t.Type; SpecialDataLen: t.Type; SpecialRegisterAddr: t.Type; }>]>; /** * Codec for {@link ChipCNS7263RGBVExtendProperty} * @category Codecs * @see Automatically generated from ../decompiled/Nova.LCT.GigabitSystem.ChipCNS7263.decompiled.cs:2370 */ declare const ChipCNS7263RGBVExtendProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; IsAdvancedMode: t.Type; MTTime: t.Type; }>, t.PartialC<{ RedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; GreenProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; BlueProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; VRedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.TypeC<{ REG_LENGTH: t.Type; RegisterArray: t.ArrayC>; }>, t.PartialC<{ OPEN_DET: t.Type; SCAN_LINE: t.Type; PWM_OPT: t.Type; PWM_REV: t.Type; ADJ: t.Type; IGAIN: t.Type; ADJ_Enable: t.Type; KeenPointVoltage: t.Type; FirstLineOffsetCompensation: t.Type; PWM_ALL: t.Type; PWM_ALL_Enable: t.Type; FirstLineOffsetCompensation_Enable: t.Type; OPEN_RST: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263ExtendProperty">; }>]>; IsUseNewModule: t.Type; IsStarSwipPoint: t.Type; SpecialDataLen: t.Type; SpecialRegisterAddr: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCNS7263RGBVExtendProperty">; }>]>; interface ChipCNS7263RGBVExtendProperty extends t.TypeOf { RedProperty?: ChipCNS7263ExtendProperty; GreenProperty?: ChipCNS7263ExtendProperty; BlueProperty?: ChipCNS7263ExtendProperty; VRedProperty?: ChipCNS7263ExtendProperty; } //#endregion export { ChipCNS7263RGBVExtendPropertyBase as n, ChipCNS7263RGBVExtendProperty as t }; //# sourceMappingURL=ChipCNS7263RGBVExtendProperty-BvksBjDQ.d.mts.map