import { t as ChipCFD955AExtendProperty } from "./ChipCFD955AExtendProperty-fxE-I6Nj.cjs"; import * as t from "io-ts"; //#region generated/ChipCFD955ARGBVExtendProperty.d.ts declare const ChipCFD955ARGBVExtendPropertyBase: t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ RedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; GreenProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; BlueProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; VRedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; SubField: t.Type; GrayDepth: t.Type; IsAdvancedMode: t.Type; IsUseNewModule: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; SpecialDataLen: t.Type; SpecialRegisterAddr: t.Type; }>]>; /** * Codec for {@link ChipCFD955ARGBVExtendProperty} * @category Codecs * @see Automatically generated from ../decompiled/Nova.LCT.GigabitSystem.ChipCFD955A.decompiled.cs:4145 */ declare const ChipCFD955ARGBVExtendProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ RedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; GreenProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; BlueProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; VRedProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; SubField: t.Type; GrayDepth: t.Type; IsAdvancedMode: t.Type; IsUseNewModule: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; SpecialDataLen: t.Type; SpecialRegisterAddr: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955ARGBVExtendProperty">; }>]>; interface ChipCFD955ARGBVExtendProperty extends t.TypeOf { RedProperty?: ChipCFD955AExtendProperty; GreenProperty?: ChipCFD955AExtendProperty; BlueProperty?: ChipCFD955AExtendProperty; VRedProperty?: ChipCFD955AExtendProperty; } //#endregion export { ChipCFD955ARGBVExtendPropertyBase as n, ChipCFD955ARGBVExtendProperty as t }; //# sourceMappingURL=ChipCFD955ARGBVExtendProperty-DJ6acMmn.d.cts.map