import * as t from "io-ts"; //#region generated/ChipCFD955AExtendProperty.d.ts declare const ChipCFD955AExtendPropertyBase: t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>; /** * Codec for {@link ChipCFD955AExtendProperty} * @category Codecs * @see Automatically generated from ../decompiled/Nova.LCT.GigabitSystem.ChipCFD955A.decompiled.cs:3658 */ declare const ChipCFD955AExtendProperty: t.IntersectionC<[t.IntersectionC<[t.PartialC<{ IsSetLowEffectGamma: t.Type; }>, t.PartialC<{ IsUseNewModule: t.Type; ChipLibVersion: t.Type; FirstRegValue: t.Type; SecondRegValue: t.Type; ThirdRegValue: t.Type; FourthRegValue: t.Type; FifthRegValue: t.Type; SixthRegValue: t.Type; SeventhRegValue: t.Type; RefreshRate: t.Type; ScanNumSetting: t.Type; CurrentGain: t.Type; LowAshEnhanceUniformity: t.Type; LineBlankStrength: t.Type; OutputResponse: t.Type; PerDriverCycleNumSetting: t.Type; LineBlankEnhanceModeEn: t.Type; CoupledOutputShift: t.Type; OpenTestPointAdjust: t.Type; CouplingOptimizationEn: t.Type; LowGrayCompsentionTimeSettingMode: t.Type; CouplingRangeAdjust: t.Type; PerDriverEnable: t.Type; PWMGraySetting: t.Type; OpenProtectEnable: t.Type; ScanMode: t.Type; LowGrayPulseWidthCompensation: t.Type; PLLFreqDivision: t.Type; PLLFreqDoubling: t.Type; CurrentGear: t.Type; LowGrayCompsentionStrength: t.Type; OpenDynamicTestEnable: t.Type; CurrentCompsentionEnable: t.Type; ConstantCurrentInflectionPoint: t.Type; DynamicEnergySavingEn: t.Type; LineEliminationLength: t.Type; PerDriverMode: t.Type; PerDriverTimeSetting: t.Type; OpentestThresholdValue: t.Type; CurrentCompsentionGear: t.Type; SRAMSelectClock: t.Type; WakeUpSettings: t.Type; }>]>, t.PartialC<{ '@_xsi:type': t.LiteralC<"ChipCFD955AExtendProperty">; }>]>; interface ChipCFD955AExtendProperty extends t.TypeOf {} //#endregion export { ChipCFD955AExtendPropertyBase as n, ChipCFD955AExtendProperty as t }; //# sourceMappingURL=ChipCFD955AExtendProperty-D6laLuG3.d.mts.map