{
  "address": "0x2F5E57242725F2a763ba3Af2Af69D1998E4a14a8",
  "abi": [
    {
      "inputs": [
        {
          "internalType": "contract IPreimageOracle",
          "name": "_oracle",
          "type": "address"
        }
      ],
      "stateMutability": "nonpayable",
      "type": "constructor"
    },
    {
      "inputs": [],
      "name": "oracle",
      "outputs": [
        {
          "internalType": "contract IPreimageOracle",
          "name": "oracle_",
          "type": "address"
        }
      ],
      "stateMutability": "view",
      "type": "function"
    },
    {
      "inputs": [
        {
          "internalType": "bytes",
          "name": "_stateData",
          "type": "bytes"
        },
        {
          "internalType": "bytes",
          "name": "_proof",
          "type": "bytes"
        },
        {
          "internalType": "bytes32",
          "name": "_localContext",
          "type": "bytes32"
        }
      ],
      "name": "step",
      "outputs": [
        {
          "internalType": "bytes32",
          "name": "",
          "type": "bytes32"
        }
      ],
      "stateMutability": "nonpayable",
      "type": "function"
    },
    {
      "inputs": [],
      "name": "version",
      "outputs": [
        {
          "internalType": "string",
          "name": "",
          "type": "string"
        }
      ],
      "stateMutability": "view",
      "type": "function"
    }
  ],
  "transactionHash": "0xb1d16376c084f466a9c3e0fb85d274a23cda075fadd9869699ced8609a3497d3",
  "receipt": {
    "to": null,
    "from": "0x012347D9D1cC9df8d53289d43d84b5bCdED7F480",
    "contractAddress": "0x2F5E57242725F2a763ba3Af2Af69D1998E4a14a8",
    "transactionIndex": 0,
    "gasUsed": "2023097",
    "logsBloom": "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
    "blockHash": "0xe73cb5e4a168998247e81aeb4c2f83e7058dc03efe88e71188b9433fb52cfb7d",
    "transactionHash": "0xb1d16376c084f466a9c3e0fb85d274a23cda075fadd9869699ced8609a3497d3",
    "logs": [],
    "blockNumber": 178,
    "cumulativeGasUsed": "2023097",
    "status": 1,
    "byzantium": true
  },
  "args": [
    "0x7d9bB25beF0D4556C57A20B1335b9b77d9CFFA1f"
  ],
  "numDeployments": 1,
  "solcInputHash": "452b4108adbe7ec4e50c9cf8a60feb9d",
  "metadata": "{\"compiler\":{\"version\":\"0.8.15+commit.e14f2714\"},\"language\":\"Solidity\",\"output\":{\"abi\":[{\"inputs\":[{\"internalType\":\"contract IPreimageOracle\",\"name\":\"_oracle\",\"type\":\"address\"}],\"stateMutability\":\"nonpayable\",\"type\":\"constructor\"},{\"inputs\":[],\"name\":\"oracle\",\"outputs\":[{\"internalType\":\"contract IPreimageOracle\",\"name\":\"oracle_\",\"type\":\"address\"}],\"stateMutability\":\"view\",\"type\":\"function\"},{\"inputs\":[{\"internalType\":\"bytes\",\"name\":\"_stateData\",\"type\":\"bytes\"},{\"internalType\":\"bytes\",\"name\":\"_proof\",\"type\":\"bytes\"},{\"internalType\":\"bytes32\",\"name\":\"_localContext\",\"type\":\"bytes32\"}],\"name\":\"step\",\"outputs\":[{\"internalType\":\"bytes32\",\"name\":\"\",\"type\":\"bytes32\"}],\"stateMutability\":\"nonpayable\",\"type\":\"function\"},{\"inputs\":[],\"name\":\"version\",\"outputs\":[{\"internalType\":\"string\",\"name\":\"\",\"type\":\"string\"}],\"stateMutability\":\"view\",\"type\":\"function\"}],\"devdoc\":{\"details\":\"https://inst.eecs.berkeley.edu/~cs61c/resources/MIPS_Green_Sheet.pdfhttps://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf      (page A-177)https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdfhttps://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formatshttps://github.com/golang/go/blob/master/src/syscall/zerrors_linux_mips.go      MIPS linux kernel errors used by Go runtime\",\"kind\":\"dev\",\"methods\":{\"constructor\":{\"params\":{\"_oracle\":\"The address of the preimage oracle contract.\"}},\"oracle()\":{\"returns\":{\"oracle_\":\"The IPreimageOracle contract.\"}},\"step(bytes,bytes,bytes32)\":{\"params\":{\"_localContext\":\"The local key context for the preimage oracle. Optional, can be set as a constant                      if the caller only requires one set of local keys.\",\"_proof\":\"The encoded proof data for leaves within the MIPS VM's memory.\",\"_stateData\":\"The encoded state witness data.\"}}},\"stateVariables\":{\"version\":{\"custom:semver\":\"1.1.0-rc.1\"}},\"title\":\"MIPS\",\"version\":1},\"userdoc\":{\"kind\":\"user\",\"methods\":{\"oracle()\":{\"notice\":\"Getter for the pre-image oracle contract.\"},\"step(bytes,bytes,bytes32)\":{\"notice\":\"Executes a single step of the vm.         Will revert if any required input state is missing.\"},\"version()\":{\"notice\":\"The semantic version of the MIPS contract.\"}},\"notice\":\"The MIPS contract emulates a single MIPS instruction.         Note that delay slots are isolated instructions:         the nextPC in the state pre-schedules where the VM jumps next.         The Step input is a packed VM state, with binary-merkle-tree         witness data for memory reads/writes.         The Step outputs a keccak256 hash of the packed VM State,         and logs the resulting state for offchain usage.\",\"version\":1}},\"settings\":{\"compilationTarget\":{\"contracts/L1/cannon/MIPS.sol\":\"MIPS\"},\"evmVersion\":\"london\",\"libraries\":{},\"metadata\":{\"bytecodeHash\":\"ipfs\",\"useLiteralContent\":true},\"optimizer\":{\"enabled\":true,\"runs\":5000},\"remappings\":[]},\"sources\":{\"contracts/L1/cannon/MIPS.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\nimport {ISemver} from \\\"../../universal/ISemver.sol\\\";\\nimport {IPreimageOracle} from \\\"./interfaces/IPreimageOracle.sol\\\";\\nimport {PreimageKeyLib} from \\\"./PreimageKeyLib.sol\\\";\\nimport {MIPSInstructions as ins} from \\\"./libraries/MIPSInstructions.sol\\\";\\nimport {MIPSSyscalls as sys} from \\\"./libraries/MIPSSyscalls.sol\\\";\\nimport {MIPSState as st} from \\\"./libraries/MIPSState.sol\\\";\\nimport {MIPSMemory} from \\\"./libraries/MIPSMemory.sol\\\";\\n\\n/// @title MIPS\\n/// @notice The MIPS contract emulates a single MIPS instruction.\\n///         Note that delay slots are isolated instructions:\\n///         the nextPC in the state pre-schedules where the VM jumps next.\\n///         The Step input is a packed VM state, with binary-merkle-tree\\n///         witness data for memory reads/writes.\\n///         The Step outputs a keccak256 hash of the packed VM State,\\n///         and logs the resulting state for offchain usage.\\n/// @dev https://inst.eecs.berkeley.edu/~cs61c/resources/MIPS_Green_Sheet.pdf\\n/// @dev https://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf\\n///      (page A-177)\\n/// @dev https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdf\\n/// @dev https://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formats\\n/// @dev https://github.com/golang/go/blob/master/src/syscall/zerrors_linux_mips.go\\n///      MIPS linux kernel errors used by Go runtime\\ncontract MIPS is ISemver {\\n    /// @notice Stores the VM state.\\n    ///         Total state size: 32 + 32 + 6 * 4 + 1 + 1 + 8 + 32 * 4 = 226 bytes\\n    ///         If nextPC != pc + 4, then the VM is executing a branch/jump delay slot.\\n    struct State {\\n        bytes32 memRoot;\\n        bytes32 preimageKey;\\n        uint32 preimageOffset;\\n        uint32 pc;\\n        uint32 nextPC;\\n        uint32 lo;\\n        uint32 hi;\\n        uint32 heap;\\n        uint8 exitCode;\\n        bool exited;\\n        uint64 step;\\n        uint32[32] registers;\\n    }\\n\\n    /// @notice The semantic version of the MIPS contract.\\n    /// @custom:semver 1.1.0-rc.1\\n    string public constant version = \\\"1.1.0-rc.1\\\";\\n\\n    /// @notice The preimage oracle contract.\\n    IPreimageOracle internal immutable ORACLE;\\n\\n    // The offset of the start of proof calldata (_proof.offset) in the step() function\\n    uint256 internal constant STEP_PROOF_OFFSET = 420;\\n\\n    /// @param _oracle The address of the preimage oracle contract.\\n    constructor(IPreimageOracle _oracle) {\\n        ORACLE = _oracle;\\n    }\\n\\n    /// @notice Getter for the pre-image oracle contract.\\n    /// @return oracle_ The IPreimageOracle contract.\\n    function oracle() external view returns (IPreimageOracle oracle_) {\\n        oracle_ = ORACLE;\\n    }\\n\\n    /// @notice Computes the hash of the MIPS state.\\n    /// @return out_ The hashed MIPS state.\\n    function outputState() internal returns (bytes32 out_) {\\n        assembly {\\n        // copies 'size' bytes, right-aligned in word at 'from', to 'to', incl. trailing data\\n            function copyMem(from, to, size) -> fromOut, toOut {\\n                mstore(to, mload(add(from, sub(32, size))))\\n                fromOut := add(from, 32)\\n                toOut := add(to, size)\\n            }\\n\\n        // From points to the MIPS State\\n            let from := 0x80\\n\\n        // Copy to the free memory pointer\\n            let start := mload(0x40)\\n            let to := start\\n\\n        // Copy state to free memory\\n            from, to := copyMem(from, to, 32) // memRoot\\n            from, to := copyMem(from, to, 32) // preimageKey\\n            from, to := copyMem(from, to, 4) // preimageOffset\\n            from, to := copyMem(from, to, 4) // pc\\n            from, to := copyMem(from, to, 4) // nextPC\\n            from, to := copyMem(from, to, 4) // lo\\n            from, to := copyMem(from, to, 4) // hi\\n            from, to := copyMem(from, to, 4) // heap\\n            let exitCode := mload(from)\\n            from, to := copyMem(from, to, 1) // exitCode\\n            let exited := mload(from)\\n            from, to := copyMem(from, to, 1) // exited\\n            from, to := copyMem(from, to, 8) // step\\n            from := add(from, 32) // offset to registers\\n\\n        // Verify that the value of exited is valid (0 or 1)\\n            if gt(exited, 1) {\\n            // revert InvalidExitedValue();\\n                let ptr := mload(0x40)\\n                mstore(ptr, shl(224, 0x0136cc76))\\n                revert(ptr, 0x04)\\n            }\\n\\n        // Copy registers\\n            for {let i := 0} lt(i, 32) {i := add(i, 1)} {from, to := copyMem(from, to, 4)}\\n\\n        // Clean up end of memory\\n            mstore(to, 0)\\n\\n        // Log the resulting MIPS state, for debugging\\n            log0(start, sub(to, start))\\n\\n        // Determine the VM status\\n            let status := 0\\n            switch exited\\n            case 1 {\\n                switch exitCode\\n                // VMStatusValid\\n                case 0 {status := 0}\\n                // VMStatusInvalid\\n                case 1 {status := 1}\\n                // VMStatusPanic\\n                default {status := 2}\\n            }\\n            // VMStatusUnfinished\\n            default {status := 3}\\n\\n        // Compute the hash of the resulting MIPS state and set the status byte\\n            out_ := keccak256(start, sub(to, start))\\n            out_ := or(and(not(shl(248, 0xFF)), out_), shl(248, status))\\n        }\\n    }\\n\\n    /// @notice Handles a syscall.\\n    /// @param _localContext The local key context for the preimage oracle.\\n    /// @return out_ The hashed MIPS state.\\n    function handleSyscall(bytes32 _localContext) internal returns (bytes32 out_) {\\n        unchecked {\\n        // Load state from memory\\n            State memory state;\\n            assembly {\\n                state := 0x80\\n            }\\n\\n        // Load the syscall numbers and args from the registers\\n            (uint32 syscall_no, uint32 a0, uint32 a1, uint32 a2,) = sys.getSyscallArgs(state.registers);\\n\\n            uint32 v0 = 0;\\n            uint32 v1 = 0;\\n\\n            if (syscall_no == sys.SYS_MMAP) {\\n                (v0, v1, state.heap) = sys.handleSysMmap(a0, a1, state.heap);\\n            } else if (syscall_no == sys.SYS_BRK) {\\n                // brk: Returns a fixed address for the program break at 0x40000000\\n                v0 = sys.PROGRAM_BREAK;\\n            } else if (syscall_no == sys.SYS_CLONE) {\\n                // clone (not supported) returns 1\\n                v0 = 1;\\n            } else if (syscall_no == sys.SYS_EXIT_GROUP) {\\n                // exit group: Sets the Exited and ExitCode states to true and argument 0.\\n                state.exited = true;\\n                state.exitCode = uint8(a0);\\n                return outputState();\\n            } else if (syscall_no == sys.SYS_READ) {\\n                sys.SysReadParams memory args = sys.SysReadParams({\\n                    a0: a0,\\n                    a1: a1,\\n                    a2: a2,\\n                    preimageKey: state.preimageKey,\\n                    preimageOffset: state.preimageOffset,\\n                    localContext: _localContext,\\n                    oracle: ORACLE,\\n                    proofOffset: MIPSMemory.memoryProofOffset(STEP_PROOF_OFFSET, 1),\\n                    memRoot: state.memRoot\\n                });\\n                (v0, v1, state.preimageOffset, state.memRoot) = sys.handleSysRead(args);\\n            } else if (syscall_no == sys.SYS_WRITE) {\\n                (v0, v1, state.preimageKey, state.preimageOffset) = sys.handleSysWrite({\\n                    _a0: a0,\\n                    _a1: a1,\\n                    _a2: a2,\\n                    _preimageKey: state.preimageKey,\\n                    _preimageOffset: state.preimageOffset,\\n                    _proofOffset: MIPSMemory.memoryProofOffset(STEP_PROOF_OFFSET, 1),\\n                    _memRoot: state.memRoot\\n                });\\n            } else if (syscall_no == sys.SYS_FCNTL) {\\n                (v0, v1) = sys.handleSysFcntl(a0, a1);\\n            }\\n\\n            st.CpuScalars memory cpu = getCpuScalars(state);\\n            sys.handleSyscallUpdates(cpu, state.registers, v0, v1);\\n            setStateCpuScalars(state, cpu);\\n\\n            out_ = outputState();\\n        }\\n    }\\n\\n    /// @notice Executes a single step of the vm.\\n    ///         Will revert if any required input state is missing.\\n    /// @param _stateData The encoded state witness data.\\n    /// @param _proof The encoded proof data for leaves within the MIPS VM's memory.\\n    /// @param _localContext The local key context for the preimage oracle. Optional, can be set as a constant\\n    ///                      if the caller only requires one set of local keys.\\n    function step(bytes calldata _stateData, bytes calldata _proof, bytes32 _localContext) public returns (bytes32) {\\n        unchecked {\\n            State memory state;\\n\\n        // Packed calldata is ~6 times smaller than state size\\n            assembly {\\n                if iszero(eq(state, 0x80)) {\\n                // expected state mem offset check\\n                    revert(0, 0)\\n                }\\n                if iszero(eq(mload(0x40), shl(5, 48))) {\\n                // expected memory check\\n                    revert(0, 0)\\n                }\\n                if iszero(eq(_stateData.offset, 132)) {\\n                // 32*4+4=132 expected state data offset\\n                    revert(0, 0)\\n                }\\n                if iszero(eq(_proof.offset, STEP_PROOF_OFFSET)) {\\n                // 132+32+256=420 expected proof offset\\n                    revert(0, 0)\\n                }\\n\\n                function putField(callOffset, memOffset, size) -> callOffsetOut, memOffsetOut {\\n                // calldata is packed, thus starting left-aligned, shift-right to pad and right-align\\n                    let w := shr(shl(3, sub(32, size)), calldataload(callOffset))\\n                    mstore(memOffset, w)\\n                    callOffsetOut := add(callOffset, size)\\n                    memOffsetOut := add(memOffset, 32)\\n                }\\n\\n            // Unpack state from calldata into memory\\n                let c := _stateData.offset // calldata offset\\n                let m := 0x80 // mem offset\\n                c, m := putField(c, m, 32) // memRoot\\n                c, m := putField(c, m, 32) // preimageKey\\n                c, m := putField(c, m, 4) // preimageOffset\\n                c, m := putField(c, m, 4) // pc\\n                c, m := putField(c, m, 4) // nextPC\\n                c, m := putField(c, m, 4) // lo\\n                c, m := putField(c, m, 4) // hi\\n                c, m := putField(c, m, 4) // heap\\n                c, m := putField(c, m, 1) // exitCode\\n                c, m := putField(c, m, 1) // exited\\n                let exited := mload(sub(m, 32))\\n                c, m := putField(c, m, 8) // step\\n\\n            // Verify that the value of exited is valid (0 or 1)\\n                if gt(exited, 1) {\\n                // revert InvalidExitedValue();\\n                    let ptr := mload(0x40)\\n                    mstore(ptr, shl(224, 0x0136cc76))\\n                    revert(ptr, 0x04)\\n                }\\n\\n            // Compiler should have done this already\\n                if iszero(eq(mload(m), add(m, 32))) {\\n                // expected registers offset check\\n                    revert(0, 0)\\n                }\\n\\n            // Unpack register calldata into memory\\n                m := add(m, 32)\\n                for {let i := 0} lt(i, 32) {i := add(i, 1)} {c, m := putField(c, m, 4)}\\n            }\\n\\n        // Don't change state once exited\\n            if (state.exited) {\\n                return outputState();\\n            }\\n\\n            state.step += 1;\\n\\n        // instruction fetch\\n            uint256 insnProofOffset = MIPSMemory.memoryProofOffset(STEP_PROOF_OFFSET, 0);\\n            (uint32 insn, uint32 opcode, uint32 fun) =\\n                                ins.getInstructionDetails(state.pc, state.memRoot, insnProofOffset);\\n\\n        // Handle syscall separately\\n        // syscall (can read and write)\\n            if (opcode == 0 && fun == 0xC) {\\n                return handleSyscall(_localContext);\\n            }\\n\\n        // Exec the rest of the step logic\\n            st.CpuScalars memory cpu = getCpuScalars(state);\\n            (state.memRoot) = ins.execMipsCoreStepLogic({\\n                _cpu: cpu,\\n                _registers: state.registers,\\n                _memRoot: state.memRoot,\\n                _memProofOffset: MIPSMemory.memoryProofOffset(STEP_PROOF_OFFSET, 1),\\n                _insn: insn,\\n                _opcode: opcode,\\n                _fun: fun\\n            });\\n            setStateCpuScalars(state, cpu);\\n\\n            return outputState();\\n        }\\n    }\\n\\n    function getCpuScalars(State memory _state) internal pure returns (st.CpuScalars memory) {\\n        return st.CpuScalars({pc: _state.pc, nextPC: _state.nextPC, lo: _state.lo, hi: _state.hi});\\n    }\\n\\n    function setStateCpuScalars(State memory _state, st.CpuScalars memory _cpu) internal pure {\\n        _state.pc = _cpu.pc;\\n        _state.nextPC = _cpu.nextPC;\\n        _state.lo = _cpu.lo;\\n        _state.hi = _cpu.hi;\\n    }\\n}\\n\",\"keccak256\":\"0xccf12bf53f1504b677f57b5062d7961246d189069372bfb36300399c31df01ce\",\"license\":\"MIT\"},\"contracts/L1/cannon/PreimageKeyLib.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\n/// @title PreimageKeyLib\\n/// @notice Shared utilities for localizing local keys in the preimage oracle.\\nlibrary PreimageKeyLib {\\n    /// @notice Generates a context-specific local key for the given local data identifier.\\n    /// @dev See `localize` for a description of the localization operation.\\n    /// @param _ident The identifier of the local data. [0, 32) bytes in size.\\n    /// @param _localContext The local context for the key.\\n    /// @return key_ The context-specific local key.\\n    function localizeIdent(uint256 _ident, bytes32 _localContext) internal view returns (bytes32 key_) {\\n        assembly {\\n        // Set the type byte in the given identifier to `1` (Local). We only care about\\n        // the [1, 32) bytes in this value.\\n            key_ := or(shl(248, 1), and(_ident, not(shl(248, 0xFF))))\\n        }\\n        // Localize the key with the given local context.\\n        key_ = localize(key_, _localContext);\\n    }\\n\\n    /// @notice Localizes a given local data key for the caller's context.\\n    /// @dev The localization operation is defined as:\\n    ///      localize(k) = H(k .. sender .. local_context) & ~(0xFF << 248) | (0x01 << 248)\\n    ///      where H is the Keccak-256 hash function.\\n    /// @param _key The local data key to localize.\\n    /// @param _localContext The local context for the key.\\n    /// @return localizedKey_ The localized local data key.\\n    function localize(bytes32 _key, bytes32 _localContext) internal view returns (bytes32 localizedKey_) {\\n        assembly {\\n        // Grab the current free memory pointer to restore later.\\n            let ptr := mload(0x40)\\n        // Store the local data key and caller next to each other in memory for hashing.\\n            mstore(0, _key)\\n            mstore(0x20, caller())\\n            mstore(0x40, _localContext)\\n        // Localize the key with the above `localize` operation.\\n            localizedKey_ := or(and(keccak256(0, 0x60), not(shl(248, 0xFF))), shl(248, 1))\\n        // Restore the free memory pointer.\\n            mstore(0x40, ptr)\\n        }\\n    }\\n\\n    /// @notice Computes and returns the key for a global keccak pre-image.\\n    /// @param _preimage The pre-image.\\n    /// @return key_ The pre-image key.\\n    function keccak256PreimageKey(bytes memory _preimage) internal pure returns (bytes32 key_) {\\n        assembly {\\n        // Grab the size of the `_preimage`\\n            let size := mload(_preimage)\\n\\n        // Compute the pre-image keccak256 hash (aka the pre-image key)\\n            let h := keccak256(add(_preimage, 0x20), size)\\n\\n        // Mask out prefix byte, replace with type 2 byte\\n            key_ := or(and(h, not(shl(248, 0xFF))), shl(248, 2))\\n        }\\n    }\\n}\\n\",\"keccak256\":\"0x6f22ae4ce96a055be1cdc888bd51bbd32d14d141e9d5d21102ff12f17683d006\",\"license\":\"MIT\"},\"contracts/L1/cannon/interfaces/IPreimageOracle.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\n/// @title IPreimageOracle\\n/// @notice Interface for a preimage oracle.\\ninterface IPreimageOracle {\\n    /// @notice Returns the length of the large preimage proposal challenge period.\\n    /// @return challengePeriod_ The length of the challenge period in seconds.\\n    function challengePeriod() external view returns (uint256 challengePeriod_);\\n\\n    /// @notice Reads a preimage from the oracle.\\n    /// @param _key The key of the preimage to read.\\n    /// @param _offset The offset of the preimage to read.\\n    /// @return dat_ The preimage data.\\n    /// @return datLen_ The length of the preimage data.\\n    function readPreimage(bytes32 _key, uint256 _offset) external view returns (bytes32 dat_, uint256 datLen_);\\n\\n    /// @notice Loads of local data part into the preimage oracle.\\n    /// @param _ident The identifier of the local data.\\n    /// @param _localContext The local key context for the preimage oracle. Optionally, can be set as a constant\\n    ///                      if the caller only requires one set of local keys.\\n    /// @param _word The local data word.\\n    /// @param _size The number of bytes in `_word` to load.\\n    /// @param _partOffset The offset of the local data part to write to the oracle.\\n    /// @dev The local data parts are loaded into the preimage oracle under the context\\n    ///      of the caller - no other account can write to the caller's context\\n    ///      specific data.\\n    ///\\n    ///      There are 5 local data identifiers:\\n    ///      \\u250c\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u252c\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2510\\n    ///      \\u2502 Identifier \\u2502      Data              \\u2502\\n    ///      \\u251c\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u253c\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2524\\n    ///      \\u2502          1 \\u2502 L1 Head Hash (bytes32) \\u2502\\n    ///      \\u2502          2 \\u2502 Output Root (bytes32)  \\u2502\\n    ///      \\u2502          3 \\u2502 Root Claim (bytes32)   \\u2502\\n    ///      \\u2502          4 \\u2502 L2 Block Number (u64)  \\u2502\\n    ///      \\u2502          5 \\u2502 Chain ID (u64)         \\u2502\\n    ///      \\u2514\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2534\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2500\\u2518\\n    function loadLocalData(\\n        uint256 _ident,\\n        bytes32 _localContext,\\n        bytes32 _word,\\n        uint256 _size,\\n        uint256 _partOffset\\n    )\\n    external\\n    returns (bytes32 key_);\\n\\n    /// @notice Prepares a preimage to be read by keccak256 key, starting at the given offset and up to 32 bytes\\n    ///         (clipped at preimage length, if out of data).\\n    /// @param _partOffset The offset of the preimage to read.\\n    /// @param _preimage The preimage data.\\n    function loadKeccak256PreimagePart(uint256 _partOffset, bytes calldata _preimage) external;\\n\\n    /// @notice Prepares a preimage to be read by sha256 key, starting at the given offset and up to 32 bytes\\n    ///         (clipped at preimage length, if out of data).\\n    /// @param _partOffset The offset of the preimage to read.\\n    /// @param _preimage The preimage data.\\n    function loadSha256PreimagePart(uint256 _partOffset, bytes calldata _preimage) external;\\n\\n    /// @notice Verifies that `p(_z) = _y` given `_commitment` that corresponds to the polynomial `p(x)` and a KZG\\n    //          proof. The value `y` is the pre-image, and the preimage key is `5 ++ keccak256(_commitment ++ z)[1:]`.\\n    /// @param _z Big endian point value. Part of the preimage key.\\n    /// @param _y Big endian point value. The preimage for the key.\\n    /// @param _commitment The commitment to the polynomial. 48 bytes, part of the preimage key.\\n    /// @param _proof The KZG proof, part of the preimage key.\\n    /// @param _partOffset The offset of the preimage to store.\\n    function loadBlobPreimagePart(\\n        uint256 _z,\\n        uint256 _y,\\n        bytes calldata _commitment,\\n        bytes calldata _proof,\\n        uint256 _partOffset\\n    )\\n    external;\\n\\n    /// @notice Prepares a precompile result to be read by a precompile key for the specified offset.\\n    ///         The precompile result data is a concatenation of the precompile call status byte and its return data.\\n    ///         The preimage key is `6 ++ keccak256(precompile ++ input)[1:]`.\\n    /// @param _partOffset The offset of the precompile result being loaded.\\n    /// @param _precompile The precompile address\\n    /// @param _requiredGas The gas required to fully execute an L1 precompile.\\n    /// @param _input The input to the precompile call.\\n    function loadPrecompilePreimagePart(\\n        uint256 _partOffset,\\n        address _precompile,\\n        uint64 _requiredGas,\\n        bytes calldata _input\\n    )\\n    external;\\n}\\n\",\"keccak256\":\"0x07ef4149bead9415f75f4aef940e0a1dd5c0cfe3870ffa6fedb0ff165dd75a11\",\"license\":\"MIT\"},\"contracts/L1/cannon/libraries/MIPSInstructions.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\nimport {MIPSMemory} from \\\"./MIPSMemory.sol\\\";\\nimport {MIPSState as st} from \\\"./MIPSState.sol\\\";\\n\\nlibrary MIPSInstructions {\\n    /// @param _pc The program counter.\\n    /// @param _memRoot The current memory root.\\n    /// @param _insnProofOffset The calldata offset of the memory proof for the current instruction.\\n    /// @return insn_ The current 32-bit instruction at the pc.\\n    /// @return opcode_ The opcode value parsed from insn_.\\n    /// @return fun_ The function value parsed from insn_.\\n    function getInstructionDetails(\\n        uint32 _pc,\\n        bytes32 _memRoot,\\n        uint256 _insnProofOffset\\n    )\\n    internal\\n    pure\\n    returns (uint32 insn_, uint32 opcode_, uint32 fun_)\\n    {\\n        unchecked {\\n            insn_ = MIPSMemory.readMem(_memRoot, _pc, _insnProofOffset);\\n            opcode_ = insn_ >> 26; // First 6-bits\\n            fun_ = insn_ & 0x3f; // Last 6-bits\\n\\n            return (insn_, opcode_, fun_);\\n        }\\n    }\\n\\n    /// @notice Execute core MIPS step logic.\\n    /// @notice _cpu The CPU scalar fields.\\n    /// @notice _registers The CPU registers.\\n    /// @notice _memRoot The current merkle root of the memory.\\n    /// @notice _memProofOffset The offset in calldata specify where the memory merkle proof is located.\\n    /// @param _insn The current 32-bit instruction at the pc.\\n    /// @param _opcode The opcode value parsed from insn_.\\n    /// @param _fun The function value parsed from insn_.\\n    /// @return newMemRoot_ The updated merkle root of memory after any modifications, may be unchanged.\\n    function execMipsCoreStepLogic(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        bytes32 _memRoot,\\n        uint256 _memProofOffset,\\n        uint32 _insn,\\n        uint32 _opcode,\\n        uint32 _fun\\n    )\\n    internal\\n    pure\\n    returns (bytes32 newMemRoot_)\\n    {\\n        unchecked {\\n            newMemRoot_ = _memRoot;\\n\\n        // j-type j/jal\\n            if (_opcode == 2 || _opcode == 3) {\\n                // Take top 4 bits of the next PC (its 256 MB region), and concatenate with the 26-bit offset\\n                uint32 target = (_cpu.nextPC & 0xF0000000) | (_insn & 0x03FFFFFF) << 2;\\n                handleJump(_cpu, _registers, _opcode == 2 ? 0 : 31, target);\\n                return newMemRoot_;\\n            }\\n\\n        // register fetch\\n            uint32 rs = 0; // source register 1 value\\n            uint32 rt = 0; // source register 2 / temp value\\n            uint32 rtReg = (_insn >> 16) & 0x1F;\\n\\n        // R-type or I-type (stores rt)\\n            rs = _registers[(_insn >> 21) & 0x1F];\\n            uint32 rdReg = rtReg;\\n\\n            if (_opcode == 0 || _opcode == 0x1c) {\\n                // R-type (stores rd)\\n                rt = _registers[rtReg];\\n                rdReg = (_insn >> 11) & 0x1F;\\n            } else if (_opcode < 0x20) {\\n                // rt is SignExtImm\\n                // don't sign extend for andi, ori, xori\\n                if (_opcode == 0xC || _opcode == 0xD || _opcode == 0xe) {\\n                    // ZeroExtImm\\n                    rt = _insn & 0xFFFF;\\n                } else {\\n                    // SignExtImm\\n                    rt = signExtend(_insn & 0xFFFF, 16);\\n                }\\n            } else if (_opcode >= 0x28 || _opcode == 0x22 || _opcode == 0x26) {\\n                // store rt value with store\\n                rt = _registers[rtReg];\\n\\n                // store actual rt with lwl and lwr\\n                rdReg = rtReg;\\n            }\\n\\n            if ((_opcode >= 4 && _opcode < 8) || _opcode == 1) {\\n                handleBranch({\\n                    _cpu: _cpu,\\n                    _registers: _registers,\\n                    _opcode: _opcode,\\n                    _insn: _insn,\\n                    _rtReg: rtReg,\\n                    _rs: rs\\n                });\\n                return newMemRoot_;\\n            }\\n\\n            uint32 storeAddr = 0xFF_FF_FF_FF;\\n        // memory fetch (all I-type)\\n        // we do the load for stores also\\n            uint32 mem = 0;\\n            if (_opcode >= 0x20) {\\n                // M[R[rs]+SignExtImm]\\n                rs += signExtend(_insn & 0xFFFF, 16);\\n                uint32 addr = rs & 0xFFFFFFFC;\\n                mem = MIPSMemory.readMem(_memRoot, addr, _memProofOffset);\\n                if (_opcode >= 0x28 && _opcode != 0x30) {\\n                    // store\\n                    storeAddr = addr;\\n                    // store opcodes don't write back to a register\\n                    rdReg = 0;\\n                }\\n            }\\n\\n        // ALU\\n        // Note: swr outputs more than 4 bytes without the mask 0xffFFffFF\\n            uint32 val = executeMipsInstruction(_insn, _opcode, _fun, rs, rt, mem) & 0xffFFffFF;\\n\\n            if (_opcode == 0 && _fun >= 8 && _fun < 0x1c) {\\n                if (_fun == 8 || _fun == 9) {\\n                    // jr/jalr\\n                    handleJump(_cpu, _registers, _fun == 8 ? 0 : rdReg, rs);\\n                    return newMemRoot_;\\n                }\\n\\n                if (_fun == 0xa) {\\n                    // movz\\n                    handleRd(_cpu, _registers, rdReg, rs, rt == 0);\\n                    return newMemRoot_;\\n                }\\n                if (_fun == 0xb) {\\n                    // movn\\n                    handleRd(_cpu, _registers, rdReg, rs, rt != 0);\\n                    return newMemRoot_;\\n                }\\n\\n                // lo and hi registers\\n                // can write back\\n                if (_fun >= 0x10 && _fun < 0x1c) {\\n                    handleHiLo({_cpu: _cpu, _registers: _registers, _fun: _fun, _rs: rs, _rt: rt, _storeReg: rdReg});\\n\\n                    return newMemRoot_;\\n                }\\n            }\\n\\n        // stupid sc, write a 1 to rt\\n            if (_opcode == 0x38 && rtReg != 0) {\\n                _registers[rtReg] = 1;\\n            }\\n\\n        // write memory\\n            if (storeAddr != 0xFF_FF_FF_FF) {\\n                newMemRoot_ = MIPSMemory.writeMem(storeAddr, _memProofOffset, val);\\n            }\\n\\n        // write back the value to destination register\\n            handleRd(_cpu, _registers, rdReg, val, true);\\n\\n            return newMemRoot_;\\n        }\\n    }\\n\\n    /// @notice Execute an instruction.\\n    function executeMipsInstruction(\\n        uint32 _insn,\\n        uint32 _opcode,\\n        uint32 _fun,\\n        uint32 _rs,\\n        uint32 _rt,\\n        uint32 _mem\\n    )\\n    internal\\n    pure\\n    returns (uint32 out_)\\n    {\\n        unchecked {\\n            if (_opcode == 0 || (_opcode >= 8 && _opcode < 0xF)) {\\n                assembly {\\n                // transform ArithLogI to SPECIAL\\n                    switch _opcode\\n                    // addi\\n                    case 0x8 {_fun := 0x20}\\n                    // addiu\\n                    case 0x9 {_fun := 0x21}\\n                    // stli\\n                    case 0xA {_fun := 0x2A}\\n                    // sltiu\\n                    case 0xB {_fun := 0x2B}\\n                    // andi\\n                    case 0xC {_fun := 0x24}\\n                    // ori\\n                    case 0xD {_fun := 0x25}\\n                    // xori\\n                    case 0xE {_fun := 0x26}\\n                }\\n\\n                // sll\\n                if (_fun == 0x00) {\\n                    return _rt << ((_insn >> 6) & 0x1F);\\n                }\\n                    // srl\\n                else if (_fun == 0x02) {\\n                    return _rt >> ((_insn >> 6) & 0x1F);\\n                }\\n                    // sra\\n                else if (_fun == 0x03) {\\n                    uint32 shamt = (_insn >> 6) & 0x1F;\\n                    return signExtend(_rt >> shamt, 32 - shamt);\\n                }\\n                    // sllv\\n                else if (_fun == 0x04) {\\n                    return _rt << (_rs & 0x1F);\\n                }\\n                    // srlv\\n                else if (_fun == 0x6) {\\n                    return _rt >> (_rs & 0x1F);\\n                }\\n                    // srav\\n                else if (_fun == 0x07) {\\n                    // shamt here is different than the typical shamt which comes from the\\n                    // instruction itself, here it comes from the rs register\\n                    uint32 shamt = _rs & 0x1F;\\n                    return signExtend(_rt >> shamt, 32 - shamt);\\n                }\\n                    // functs in range [0x8, 0x1b] are handled specially by other functions\\n                    // Explicitly enumerate each funct in range to reduce code diff against Go Vm\\n                    // jr\\n                else if (_fun == 0x08) {\\n                    return _rs;\\n                }\\n                    // jalr\\n                else if (_fun == 0x09) {\\n                    return _rs;\\n                }\\n                    // movz\\n                else if (_fun == 0x0a) {\\n                    return _rs;\\n                }\\n                    // movn\\n                else if (_fun == 0x0b) {\\n                    return _rs;\\n                }\\n                    // syscall\\n                else if (_fun == 0x0c) {\\n                    return _rs;\\n                }\\n                    // 0x0d - break not supported\\n                    // sync\\n                else if (_fun == 0x0f) {\\n                    return _rs;\\n                }\\n                    // mfhi\\n                else if (_fun == 0x10) {\\n                    return _rs;\\n                }\\n                    // mthi\\n                else if (_fun == 0x11) {\\n                    return _rs;\\n                }\\n                    // mflo\\n                else if (_fun == 0x12) {\\n                    return _rs;\\n                }\\n                    // mtlo\\n                else if (_fun == 0x13) {\\n                    return _rs;\\n                }\\n                    // mult\\n                else if (_fun == 0x18) {\\n                    return _rs;\\n                }\\n                    // multu\\n                else if (_fun == 0x19) {\\n                    return _rs;\\n                }\\n                    // div\\n                else if (_fun == 0x1a) {\\n                    return _rs;\\n                }\\n                    // divu\\n                else if (_fun == 0x1b) {\\n                    return _rs;\\n                }\\n                    // The rest includes transformed R-type arith imm instructions\\n                    // add\\n                else if (_fun == 0x20) {\\n                    return (_rs + _rt);\\n                }\\n                    // addu\\n                else if (_fun == 0x21) {\\n                    return (_rs + _rt);\\n                }\\n                    // sub\\n                else if (_fun == 0x22) {\\n                    return (_rs - _rt);\\n                }\\n                    // subu\\n                else if (_fun == 0x23) {\\n                    return (_rs - _rt);\\n                }\\n                    // and\\n                else if (_fun == 0x24) {\\n                    return (_rs & _rt);\\n                }\\n                    // or\\n                else if (_fun == 0x25) {\\n                    return (_rs | _rt);\\n                }\\n                    // xor\\n                else if (_fun == 0x26) {\\n                    return (_rs ^ _rt);\\n                }\\n                    // nor\\n                else if (_fun == 0x27) {\\n                    return ~(_rs | _rt);\\n                }\\n                    // slti\\n                else if (_fun == 0x2a) {\\n                    return int32(_rs) < int32(_rt) ? 1 : 0;\\n                }\\n                    // sltiu\\n                else if (_fun == 0x2b) {\\n                    return _rs < _rt ? 1 : 0;\\n                } else {\\n                    revert(\\\"invalid instruction\\\");\\n                }\\n            } else {\\n                // SPECIAL2\\n                if (_opcode == 0x1C) {\\n                    // mul\\n                    if (_fun == 0x2) {\\n                        return uint32(int32(_rs) * int32(_rt));\\n                    }\\n                        // clz, clo\\n                    else if (_fun == 0x20 || _fun == 0x21) {\\n                        if (_fun == 0x20) {\\n                            _rs = ~_rs;\\n                        }\\n                        uint32 i = 0;\\n                        while (_rs & 0x80000000 != 0) {\\n                            i++;\\n                            _rs <<= 1;\\n                        }\\n                        return i;\\n                    }\\n                }\\n                    // lui\\n                else if (_opcode == 0x0F) {\\n                    return _rt << 16;\\n                }\\n                    // lb\\n                else if (_opcode == 0x20) {\\n                    return signExtend((_mem >> (24 - (_rs & 3) * 8)) & 0xFF, 8);\\n                }\\n                    // lh\\n                else if (_opcode == 0x21) {\\n                    return signExtend((_mem >> (16 - (_rs & 2) * 8)) & 0xFFFF, 16);\\n                }\\n                    // lwl\\n                else if (_opcode == 0x22) {\\n                    uint32 val = _mem << ((_rs & 3) * 8);\\n                    uint32 mask = uint32(0xFFFFFFFF) << ((_rs & 3) * 8);\\n                    return (_rt & ~mask) | val;\\n                }\\n                    // lw\\n                else if (_opcode == 0x23) {\\n                    return _mem;\\n                }\\n                    // lbu\\n                else if (_opcode == 0x24) {\\n                    return (_mem >> (24 - (_rs & 3) * 8)) & 0xFF;\\n                }\\n                    //  lhu\\n                else if (_opcode == 0x25) {\\n                    return (_mem >> (16 - (_rs & 2) * 8)) & 0xFFFF;\\n                }\\n                    //  lwr\\n                else if (_opcode == 0x26) {\\n                    uint32 val = _mem >> (24 - (_rs & 3) * 8);\\n                    uint32 mask = uint32(0xFFFFFFFF) >> (24 - (_rs & 3) * 8);\\n                    return (_rt & ~mask) | val;\\n                }\\n                    //  sb\\n                else if (_opcode == 0x28) {\\n                    uint32 val = (_rt & 0xFF) << (24 - (_rs & 3) * 8);\\n                    uint32 mask = 0xFFFFFFFF ^ uint32(0xFF << (24 - (_rs & 3) * 8));\\n                    return (_mem & mask) | val;\\n                }\\n                    //  sh\\n                else if (_opcode == 0x29) {\\n                    uint32 val = (_rt & 0xFFFF) << (16 - (_rs & 2) * 8);\\n                    uint32 mask = 0xFFFFFFFF ^ uint32(0xFFFF << (16 - (_rs & 2) * 8));\\n                    return (_mem & mask) | val;\\n                }\\n                    //  swl\\n                else if (_opcode == 0x2a) {\\n                    uint32 val = _rt >> ((_rs & 3) * 8);\\n                    uint32 mask = uint32(0xFFFFFFFF) >> ((_rs & 3) * 8);\\n                    return (_mem & ~mask) | val;\\n                }\\n                    //  sw\\n                else if (_opcode == 0x2b) {\\n                    return _rt;\\n                }\\n                    //  swr\\n                else if (_opcode == 0x2e) {\\n                    uint32 val = _rt << (24 - (_rs & 3) * 8);\\n                    uint32 mask = uint32(0xFFFFFFFF) << (24 - (_rs & 3) * 8);\\n                    return (_mem & ~mask) | val;\\n                }\\n                    // ll\\n                else if (_opcode == 0x30) {\\n                    return _mem;\\n                }\\n                    // sc\\n                else if (_opcode == 0x38) {\\n                    return _rt;\\n                } else {\\n                    revert(\\\"invalid instruction\\\");\\n                }\\n            }\\n            revert(\\\"invalid instruction\\\");\\n        }\\n    }\\n\\n    /// @notice Extends the value leftwards with its most significant bit (sign extension).\\n    function signExtend(uint32 _dat, uint32 _idx) internal pure returns (uint32 out_) {\\n        unchecked {\\n            bool isSigned = (_dat >> (_idx - 1)) != 0;\\n            uint256 signed = ((1 << (32 - _idx)) - 1) << _idx;\\n            uint256 mask = (1 << _idx) - 1;\\n            return uint32(_dat & mask | (isSigned ? signed : 0));\\n        }\\n    }\\n\\n    /// @notice Handles a branch instruction, updating the MIPS state PC where needed.\\n    /// @param _cpu Holds the state of cpu scalars pc, nextPC, hi, lo.\\n    /// @param _registers Holds the current state of the cpu registers.\\n    /// @param _opcode The opcode of the branch instruction.\\n    /// @param _insn The instruction to be executed.\\n    /// @param _rtReg The register to be used for the branch.\\n    /// @param _rs The register to be compared with the branch register.\\n    function handleBranch(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        uint32 _opcode,\\n        uint32 _insn,\\n        uint32 _rtReg,\\n        uint32 _rs\\n    )\\n    internal\\n    pure\\n    {\\n        unchecked {\\n            bool shouldBranch = false;\\n\\n            if (_cpu.nextPC != _cpu.pc + 4) {\\n                revert(\\\"branch in delay slot\\\");\\n            }\\n\\n        // beq/bne: Branch on equal / not equal\\n            if (_opcode == 4 || _opcode == 5) {\\n                uint32 rt = _registers[_rtReg];\\n                shouldBranch = (_rs == rt && _opcode == 4) || (_rs != rt && _opcode == 5);\\n            }\\n                // blez: Branches if instruction is less than or equal to zero\\n            else if (_opcode == 6) {\\n                shouldBranch = int32(_rs) <= 0;\\n            }\\n                // bgtz: Branches if instruction is greater than zero\\n            else if (_opcode == 7) {\\n                shouldBranch = int32(_rs) > 0;\\n            }\\n                // bltz/bgez: Branch on less than zero / greater than or equal to zero\\n            else if (_opcode == 1) {\\n                // regimm\\n                uint32 rtv = ((_insn >> 16) & 0x1F);\\n                if (rtv == 0) {\\n                    shouldBranch = int32(_rs) < 0;\\n                }\\n                if (rtv == 1) {\\n                    shouldBranch = int32(_rs) >= 0;\\n                }\\n            }\\n\\n        // Update the state's previous PC\\n            uint32 prevPC = _cpu.pc;\\n\\n        // Execute the delay slot first\\n            _cpu.pc = _cpu.nextPC;\\n\\n        // If we should branch, update the PC to the branch target\\n        // Otherwise, proceed to the next instruction\\n            if (shouldBranch) {\\n                _cpu.nextPC = prevPC + 4 + (signExtend(_insn & 0xFFFF, 16) << 2);\\n            } else {\\n                _cpu.nextPC = _cpu.nextPC + 4;\\n            }\\n        }\\n    }\\n\\n    /// @notice Handles HI and LO register instructions.\\n    /// @param _cpu Holds the state of cpu scalars pc, nextPC, hi, lo.\\n    /// @param _registers Holds the current state of the cpu registers.\\n    /// @param _fun The function code of the instruction.\\n    /// @param _rs The value of the RS register.\\n    /// @param _rt The value of the RT register.\\n    /// @param _storeReg The register to store the result in.\\n    function handleHiLo(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        uint32 _fun,\\n        uint32 _rs,\\n        uint32 _rt,\\n        uint32 _storeReg\\n    )\\n    internal\\n    pure\\n    {\\n        unchecked {\\n            uint32 val = 0;\\n\\n        // mfhi: Move the contents of the HI register into the destination\\n            if (_fun == 0x10) {\\n                val = _cpu.hi;\\n            }\\n                // mthi: Move the contents of the source into the HI register\\n            else if (_fun == 0x11) {\\n                _cpu.hi = _rs;\\n            }\\n                // mflo: Move the contents of the LO register into the destination\\n            else if (_fun == 0x12) {\\n                val = _cpu.lo;\\n            }\\n                // mtlo: Move the contents of the source into the LO register\\n            else if (_fun == 0x13) {\\n                _cpu.lo = _rs;\\n            }\\n                // mult: Multiplies `rs` by `rt` and stores the result in HI and LO registers\\n            else if (_fun == 0x18) {\\n                uint64 acc = uint64(int64(int32(_rs)) * int64(int32(_rt)));\\n                _cpu.hi = uint32(acc >> 32);\\n                _cpu.lo = uint32(acc);\\n            }\\n                // multu: Unsigned multiplies `rs` by `rt` and stores the result in HI and LO registers\\n            else if (_fun == 0x19) {\\n                uint64 acc = uint64(uint64(_rs) * uint64(_rt));\\n                _cpu.hi = uint32(acc >> 32);\\n                _cpu.lo = uint32(acc);\\n            }\\n                // div: Divides `rs` by `rt`.\\n                // Stores the quotient in LO\\n                // And the remainder in HI\\n            else if (_fun == 0x1a) {\\n                if (int32(_rt) == 0) {\\n                    revert(\\\"MIPS: division by zero\\\");\\n                }\\n                _cpu.hi = uint32(int32(_rs) % int32(_rt));\\n                _cpu.lo = uint32(int32(_rs) / int32(_rt));\\n            }\\n                // divu: Unsigned divides `rs` by `rt`.\\n                // Stores the quotient in LO\\n                // And the remainder in HI\\n            else if (_fun == 0x1b) {\\n                if (_rt == 0) {\\n                    revert(\\\"MIPS: division by zero\\\");\\n                }\\n                _cpu.hi = _rs % _rt;\\n                _cpu.lo = _rs / _rt;\\n            }\\n\\n        // Store the result in the destination register, if applicable\\n            if (_storeReg != 0) {\\n                _registers[_storeReg] = val;\\n            }\\n\\n        // Update the PC\\n            _cpu.pc = _cpu.nextPC;\\n            _cpu.nextPC = _cpu.nextPC + 4;\\n        }\\n    }\\n\\n    /// @notice Handles a jump instruction, updating the MIPS state PC where needed.\\n    /// @param _cpu Holds the state of cpu scalars pc, nextPC, hi, lo.\\n    /// @param _registers Holds the current state of the cpu registers.\\n    /// @param _linkReg The register to store the link to the instruction after the delay slot instruction.\\n    /// @param _dest The destination to jump to.\\n    function handleJump(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        uint32 _linkReg,\\n        uint32 _dest\\n    )\\n    internal\\n    pure\\n    {\\n        unchecked {\\n            if (_cpu.nextPC != _cpu.pc + 4) {\\n                revert(\\\"jump in delay slot\\\");\\n            }\\n\\n        // Update the next PC to the jump destination.\\n            uint32 prevPC = _cpu.pc;\\n            _cpu.pc = _cpu.nextPC;\\n            _cpu.nextPC = _dest;\\n\\n        // Update the link-register to the instruction after the delay slot instruction.\\n            if (_linkReg != 0) {\\n                _registers[_linkReg] = prevPC + 8;\\n            }\\n        }\\n    }\\n\\n    /// @notice Handles a storing a value into a register.\\n    /// @param _cpu Holds the state of cpu scalars pc, nextPC, hi, lo.\\n    /// @param _registers Holds the current state of the cpu registers.\\n    /// @param _storeReg The register to store the value into.\\n    /// @param _val The value to store.\\n    /// @param _conditional Whether or not the store is conditional.\\n    function handleRd(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        uint32 _storeReg,\\n        uint32 _val,\\n        bool _conditional\\n    )\\n    internal\\n    pure\\n    {\\n        unchecked {\\n        // The destination register must be valid.\\n            require(_storeReg < 32, \\\"valid register\\\");\\n\\n        // Never write to reg 0, and it can be conditional (movz, movn).\\n            if (_storeReg != 0 && _conditional) {\\n                _registers[_storeReg] = _val;\\n            }\\n\\n        // Update the PC.\\n            _cpu.pc = _cpu.nextPC;\\n            _cpu.nextPC = _cpu.nextPC + 4;\\n        }\\n    }\\n}\\n\",\"keccak256\":\"0x1542bdc35285d3f3b1332d5582d18ea85232c578519c5032fb8f1824e65c5e96\",\"license\":\"MIT\"},\"contracts/L1/cannon/libraries/MIPSMemory.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\nlibrary MIPSMemory {\\n    /// @notice Reads a 32-bit value from memory.\\n    /// @param _memRoot The current memory root\\n    /// @param _addr The address to read from.\\n    /// @param _proofOffset The offset of the memory proof in calldata.\\n    /// @return out_ The hashed MIPS state.\\n    function readMem(bytes32 _memRoot, uint32 _addr, uint256 _proofOffset) internal pure returns (uint32 out_) {\\n        unchecked {\\n            validateMemoryProofAvailability(_proofOffset);\\n            assembly {\\n            // Validate the address alignement.\\n                if and(_addr, 3) {revert(0, 0)}\\n\\n            // Load the leaf value.\\n                let leaf := calldataload(_proofOffset)\\n                _proofOffset := add(_proofOffset, 32)\\n\\n            // Convenience function to hash two nodes together in scratch space.\\n                function hashPair(a, b) -> h {\\n                    mstore(0, a)\\n                    mstore(32, b)\\n                    h := keccak256(0, 64)\\n                }\\n\\n            // Start with the leaf node.\\n            // Work back up by combining with siblings, to reconstruct the root.\\n                let path := shr(5, _addr)\\n                let node := leaf\\n                for {let i := 0} lt(i, 27) {i := add(i, 1)} {\\n                    let sibling := calldataload(_proofOffset)\\n                    _proofOffset := add(_proofOffset, 32)\\n                    switch and(shr(i, path), 1)\\n                    case 0 {node := hashPair(node, sibling)}\\n                    case 1 {node := hashPair(sibling, node)}\\n                }\\n\\n            // Verify the root matches.\\n                if iszero(eq(node, _memRoot)) {\\n                    mstore(0, 0x0badf00d)\\n                    revert(0, 32)\\n                }\\n\\n            // Bits to shift = (32 - 4 - (addr % 32)) * 8\\n                let shamt := shl(3, sub(sub(32, 4), and(_addr, 31)))\\n                out_ := and(shr(shamt, leaf), 0xFFffFFff)\\n            }\\n        }\\n    }\\n\\n    /// @notice Writes a 32-bit value to memory.\\n    ///         This function first overwrites the part of the leaf.\\n    ///         Then it recomputes the memory merkle root.\\n    /// @param _addr The address to write to.\\n    /// @param _proofOffset The offset of the memory proof in calldata.\\n    /// @param _val The value to write.\\n    /// @return newMemRoot_ The new memory root after modification\\n    function writeMem(uint32 _addr, uint256 _proofOffset, uint32 _val) internal pure returns (bytes32 newMemRoot_) {\\n        unchecked {\\n            validateMemoryProofAvailability(_proofOffset);\\n            assembly {\\n            // Validate the address alignement.\\n                if and(_addr, 3) {revert(0, 0)}\\n\\n            // Load the leaf value.\\n                let leaf := calldataload(_proofOffset)\\n                let shamt := shl(3, sub(sub(32, 4), and(_addr, 31)))\\n\\n            // Mask out 4 bytes, and OR in the value\\n                leaf := or(and(leaf, not(shl(shamt, 0xFFffFFff))), shl(shamt, _val))\\n                _proofOffset := add(_proofOffset, 32)\\n\\n            // Convenience function to hash two nodes together in scratch space.\\n                function hashPair(a, b) -> h {\\n                    mstore(0, a)\\n                    mstore(32, b)\\n                    h := keccak256(0, 64)\\n                }\\n\\n            // Start with the leaf node.\\n            // Work back up by combining with siblings, to reconstruct the root.\\n                let path := shr(5, _addr)\\n                let node := leaf\\n                for {let i := 0} lt(i, 27) {i := add(i, 1)} {\\n                    let sibling := calldataload(_proofOffset)\\n                    _proofOffset := add(_proofOffset, 32)\\n                    switch and(shr(i, path), 1)\\n                    case 0 {node := hashPair(node, sibling)}\\n                    case 1 {node := hashPair(sibling, node)}\\n                }\\n\\n                newMemRoot_ := node\\n            }\\n            return newMemRoot_;\\n        }\\n    }\\n\\n    /// @notice Computes the offset of a memory proof in the calldata.\\n    /// @param _proofDataOffset The offset of the set of all memory proof data within calldata (proof.offset)\\n    ///     Equal to the offset of the first memory proof (at _proofIndex 0).\\n    /// @param _proofIndex The index of the proof in the calldata.\\n    /// @return offset_ The offset of the memory proof at the given _proofIndex in the calldata.\\n    function memoryProofOffset(uint256 _proofDataOffset, uint8 _proofIndex) internal pure returns (uint256 offset_) {\\n        unchecked {\\n        // A proof of 32 bit memory, with 32-byte leaf values, is (32-5)=27 bytes32 entries.\\n        // And the leaf value itself needs to be encoded as well: (27 + 1) = 28 bytes32 entries.\\n            offset_ = _proofDataOffset + (uint256(_proofIndex) * (28 * 32));\\n            return offset_;\\n        }\\n    }\\n\\n    /// @notice Validates that enough calldata is available to hold a full memory proof at the given offset\\n    /// @param _proofStartOffset The index of the first byte of the target memory proof in calldata\\n    function validateMemoryProofAvailability(uint256 _proofStartOffset) internal pure {\\n        unchecked {\\n            uint256 s = 0;\\n            assembly {\\n                s := calldatasize()\\n            }\\n        // A memory proof consists of 28 bytes32 values - verify we have enough calldata\\n            require(s >= (_proofStartOffset + 28 * 32), \\\"check that there is enough calldata\\\");\\n        }\\n    }\\n}\\n\",\"keccak256\":\"0x8456c0d11b1c8fbad5e947146163af567fd1a1bfe737ca1942017f03a5c5f8c3\",\"license\":\"MIT\"},\"contracts/L1/cannon/libraries/MIPSState.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\nlibrary MIPSState {\\n    struct CpuScalars {\\n        uint32 pc;\\n        uint32 nextPC;\\n        uint32 lo;\\n        uint32 hi;\\n    }\\n}\\n\",\"keccak256\":\"0x4117ee1196551fb8bc0efe4eb993c68c7bb5a43f2fd485b584750d983e265e4f\",\"license\":\"MIT\"},\"contracts/L1/cannon/libraries/MIPSSyscalls.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity 0.8.15;\\n\\nimport {MIPSMemory} from \\\"./MIPSMemory.sol\\\";\\nimport {MIPSState as st} from \\\"./MIPSState.sol\\\";\\nimport {IPreimageOracle} from \\\"../interfaces/IPreimageOracle.sol\\\";\\nimport {PreimageKeyLib} from \\\"../PreimageKeyLib.sol\\\";\\n\\nlibrary MIPSSyscalls {\\n    struct SysReadParams {\\n        /// @param _a0 The file descriptor.\\n        uint32 a0;\\n        /// @param _a1 The memory location where data should be read to.\\n        uint32 a1;\\n        /// @param _a2 The number of bytes to read from the file\\n        uint32 a2;\\n        /// @param _preimageKey The key of the preimage to read.\\n        bytes32 preimageKey;\\n        /// @param _preimageOffset The offset of the preimage to read.\\n        uint32 preimageOffset;\\n        /// @param _localContext The local context for the preimage key.\\n        bytes32 localContext;\\n        /// @param _oracle The address of the preimage oracle.\\n        IPreimageOracle oracle;\\n        /// @param _proofOffset The offset of the memory proof in calldata.\\n        uint256 proofOffset;\\n        /// @param _memRoot The current memory root.\\n        bytes32 memRoot;\\n    }\\n\\n    uint32 internal constant SYS_MMAP = 4090;\\n    uint32 internal constant SYS_BRK = 4045;\\n    uint32 internal constant SYS_CLONE = 4120;\\n    uint32 internal constant SYS_EXIT_GROUP = 4246;\\n    uint32 internal constant SYS_READ = 4003;\\n    uint32 internal constant SYS_WRITE = 4004;\\n    uint32 internal constant SYS_FCNTL = 4055;\\n    uint32 internal constant SYS_EXIT = 4001;\\n    uint32 internal constant SYS_SCHED_YIELD = 4162;\\n    uint32 internal constant SYS_GETTID = 4222;\\n    uint32 internal constant SYS_FUTEX = 4238;\\n    uint32 internal constant SYS_OPEN = 4005;\\n    uint32 internal constant SYS_NANOSLEEP = 4166;\\n    // unused syscalls\\n    uint32 internal constant SYS_CLOCK_GETTIME = 4263;\\n    uint32 internal constant SYS_GET_AFFINITY = 4240;\\n    uint32 internal constant SYS_GETAFFINITY = 4240;\\n    uint32 internal constant SYS_MADVISE = 4218;\\n    uint32 internal constant SYS_RTSIGPROCMASK = 4195;\\n    uint32 internal constant SYS_SIGALTSTACK = 4206;\\n    uint32 internal constant SYS_RTSIGACTION = 4194;\\n    uint32 internal constant SYS_PRLIMIT64 = 4338;\\n    uint32 internal constant SYS_CLOSE = 4006;\\n    uint32 internal constant SYS_PREAD64 = 4200;\\n    uint32 internal constant SYS_FSTAT64 = 4215;\\n    uint32 internal constant SYS_OPENAT = 4288;\\n    uint32 internal constant SYS_READLINK = 4085;\\n    uint32 internal constant SYS_READLINKAT = 4298;\\n    uint32 internal constant SYS_IOCTL = 4054;\\n    uint32 internal constant SYS_EPOLLCREATE1 = 4326;\\n    uint32 internal constant SYS_PIPE2 = 4328;\\n    uint32 internal constant SYS_EPOLLCTL = 4249;\\n    uint32 internal constant SYS_EPOLLPWAIT = 4313;\\n    uint32 internal constant SYS_GETRANDOM = 4353;\\n    uint32 internal constant SYS_UNAME = 4122;\\n    uint32 internal constant SYS_STAT64 = 4213;\\n    uint32 internal constant SYS_GETUID = 4024;\\n    uint32 internal constant SYS_GETGID = 4047;\\n    uint32 internal constant SYS_LLSEEK = 4140;\\n    uint32 internal constant SYS_MINCORE = 4217;\\n    uint32 internal constant SYS_TGKILL = 4266;\\n    // profiling-related syscalls - ignored\\n    uint32 internal constant SYS_SETITIMER = 4104;\\n    uint32 internal constant SYS_TIMERCREATE = 4257;\\n    uint32 internal constant SYS_TIMERSETTIME = 4258;\\n    uint32 internal constant SYS_TIMERDELETE = 4261;\\n    uint32 internal constant SYS_CLOCKGETTIME = 4263;\\n    uint32 internal constant SYS_MUNMAP = 4091;\\n\\n    uint32 internal constant FD_STDIN = 0;\\n    uint32 internal constant FD_STDOUT = 1;\\n    uint32 internal constant FD_STDERR = 2;\\n    uint32 internal constant FD_HINT_READ = 3;\\n    uint32 internal constant FD_HINT_WRITE = 4;\\n    uint32 internal constant FD_PREIMAGE_READ = 5;\\n    uint32 internal constant FD_PREIMAGE_WRITE = 6;\\n\\n    uint32 internal constant SYS_ERROR_SIGNAL = 0xFF_FF_FF_FF;\\n    uint32 internal constant EBADF = 0x9;\\n    uint32 internal constant EINVAL = 0x16;\\n    uint32 internal constant EAGAIN = 0xb;\\n    uint32 internal constant ETIMEDOUT = 0x91;\\n\\n    uint32 internal constant FUTEX_WAIT_PRIVATE = 128;\\n    uint32 internal constant FUTEX_WAKE_PRIVATE = 129;\\n    uint32 internal constant FUTEX_TIMEOUT_STEPS = 10000;\\n    uint64 internal constant FUTEX_NO_TIMEOUT = type(uint64).max;\\n    uint32 internal constant FUTEX_EMPTY_ADDR = 0xFF_FF_FF_FF;\\n\\n    uint32 internal constant SCHED_QUANTUM = 100_000;\\n    /// @notice Start of the data segment.\\n    uint32 internal constant PROGRAM_BREAK = 0x40000000;\\n    uint32 internal constant HEAP_END = 0x60000000;\\n\\n    // SYS_CLONE flags\\n    uint32 internal constant CLONE_VM = 0x100;\\n    uint32 internal constant CLONE_FS = 0x200;\\n    uint32 internal constant CLONE_FILES = 0x400;\\n    uint32 internal constant CLONE_SIGHAND = 0x800;\\n    uint32 internal constant CLONE_PTRACE = 0x2000;\\n    uint32 internal constant CLONE_VFORK = 0x4000;\\n    uint32 internal constant CLONE_PARENT = 0x8000;\\n    uint32 internal constant CLONE_THREAD = 0x10000;\\n    uint32 internal constant CLONE_NEWNS = 0x20000;\\n    uint32 internal constant CLONE_SYSVSEM = 0x40000;\\n    uint32 internal constant CLONE_SETTLS = 0x80000;\\n    uint32 internal constant CLONE_PARENTSETTID = 0x100000;\\n    uint32 internal constant CLONE_CHILDCLEARTID = 0x200000;\\n    uint32 internal constant CLONE_UNTRACED = 0x800000;\\n    uint32 internal constant CLONE_CHILDSETTID = 0x1000000;\\n    uint32 internal constant CLONE_STOPPED = 0x2000000;\\n    uint32 internal constant CLONE_NEWUTS = 0x4000000;\\n    uint32 internal constant CLONE_NEWIPC = 0x8000000;\\n    uint32 internal constant VALID_SYS_CLONE_FLAGS =\\n    CLONE_VM | CLONE_FS | CLONE_FILES | CLONE_SIGHAND | CLONE_SYSVSEM | CLONE_THREAD;\\n\\n    /// @notice Extract syscall num and arguments from registers.\\n    /// @param _registers The cpu registers.\\n    /// @return sysCallNum_ The syscall number.\\n    /// @return a0_ The first argument available to the syscall operation.\\n    /// @return a1_ The second argument available to the syscall operation.\\n    /// @return a2_ The third argument available to the syscall operation.\\n    /// @return a3_ The fourth argument available to the syscall operation.\\n    function getSyscallArgs(uint32[32] memory _registers)\\n    internal\\n    pure\\n    returns (uint32 sysCallNum_, uint32 a0_, uint32 a1_, uint32 a2_, uint32 a3_)\\n    {\\n        unchecked {\\n            sysCallNum_ = _registers[2];\\n\\n            a0_ = _registers[4];\\n            a1_ = _registers[5];\\n            a2_ = _registers[6];\\n            a3_ = _registers[7];\\n\\n            return (sysCallNum_, a0_, a1_, a2_, a3_);\\n        }\\n    }\\n\\n    /// @notice Like a Linux mmap syscall. Allocates a page from the heap.\\n    /// @param _a0 The address for the new mapping\\n    /// @param _a1 The size of the new mapping\\n    /// @param _heap The current value of the heap pointer\\n    /// @return v0_ The address of the new mapping\\n    /// @return v1_ Unused error code (0)\\n    /// @return newHeap_ The new value for the heap, may be unchanged\\n    function handleSysMmap(\\n        uint32 _a0,\\n        uint32 _a1,\\n        uint32 _heap\\n    )\\n    internal\\n    pure\\n    returns (uint32 v0_, uint32 v1_, uint32 newHeap_)\\n    {\\n        unchecked {\\n            v1_ = uint32(0);\\n            newHeap_ = _heap;\\n\\n            uint32 sz = _a1;\\n            if (sz & 4095 != 0) {\\n                // adjust size to align with page size\\n                sz += 4096 - (sz & 4095);\\n            }\\n            if (_a0 == 0) {\\n                v0_ = _heap;\\n                newHeap_ += sz;\\n                // Fail if new heap exceeds memory limit, newHeap overflows to low memory, or sz overflows\\n                if (newHeap_ > HEAP_END || newHeap_ < _heap || sz < _a1) {\\n                    v0_ = SYS_ERROR_SIGNAL;\\n                    v1_ = EINVAL;\\n                    return (v0_, v1_, _heap);\\n                }\\n            } else {\\n                v0_ = _a0;\\n            }\\n\\n            return (v0_, v1_, newHeap_);\\n        }\\n    }\\n\\n    /// @notice Like a Linux read syscall. Splits unaligned reads into aligned reads.\\n    ///         Args are provided as a struct to reduce stack pressure.\\n    /// @return v0_ The number of bytes read, -1 on error.\\n    /// @return v1_ The error code, 0 if there is no error.\\n    /// @return newPreimageOffset_ The new value for the preimage offset.\\n    /// @return newMemRoot_ The new memory root.\\n    function handleSysRead(SysReadParams memory _args)\\n    internal\\n    view\\n    returns (uint32 v0_, uint32 v1_, uint32 newPreimageOffset_, bytes32 newMemRoot_)\\n    {\\n        unchecked {\\n            v0_ = uint32(0);\\n            v1_ = uint32(0);\\n            newMemRoot_ = _args.memRoot;\\n            newPreimageOffset_ = _args.preimageOffset;\\n\\n        // args: _a0 = fd, _a1 = addr, _a2 = count\\n        // returns: v0_ = read, v1_ = err code\\n            if (_args.a0 == FD_STDIN) {\\n                // Leave v0_ and v1_ zero: read nothing, no error\\n            }\\n                // pre-image oracle read\\n            else if (_args.a0 == FD_PREIMAGE_READ) {\\n                // verify proof is correct, and get the existing memory.\\n                // mask the addr to align it to 4 bytes\\n                uint32 mem = MIPSMemory.readMem(_args.memRoot, _args.a1 & 0xFFffFFfc, _args.proofOffset);\\n                // If the preimage key is a local key, localize it in the context of the caller.\\n                if (uint8(_args.preimageKey[0]) == 1) {\\n                    _args.preimageKey = PreimageKeyLib.localize(_args.preimageKey, _args.localContext);\\n                }\\n                (bytes32 dat, uint256 datLen) = _args.oracle.readPreimage(_args.preimageKey, _args.preimageOffset);\\n\\n                // Transform data for writing to memory\\n                // We use assembly for more precise ops, and no var count limit\\n                uint32 a1 = _args.a1;\\n                uint32 a2 = _args.a2;\\n                assembly {\\n                    let alignment := and(a1, 3) // the read might not start at an aligned address\\n                    let space := sub(4, alignment) // remaining space in memory word\\n                    if lt(space, datLen) {datLen := space} // if less space than data, shorten data\\n                    if lt(a2, datLen) {datLen := a2} // if requested to read less, read less\\n                    dat := shr(sub(256, mul(datLen, 8)), dat) // right-align data\\n                    dat := shl(mul(sub(sub(4, datLen), alignment), 8), dat) // position data to insert into memory\\n                // word\\n                    let mask := sub(shl(mul(sub(4, alignment), 8), 1), 1) // mask all bytes after start\\n                    let suffixMask := sub(shl(mul(sub(sub(4, alignment), datLen), 8), 1), 1) // mask of all bytes\\n                // starting from end, maybe none\\n                    mask := and(mask, not(suffixMask)) // reduce mask to just cover the data we insert\\n                    mem := or(and(mem, not(mask)), dat) // clear masked part of original memory, and insert data\\n                }\\n\\n                // Write memory back\\n                newMemRoot_ = MIPSMemory.writeMem(_args.a1 & 0xFFffFFfc, _args.proofOffset, mem);\\n                newPreimageOffset_ += uint32(datLen);\\n                v0_ = uint32(datLen);\\n            }\\n                // hint response\\n            else if (_args.a0 == FD_HINT_READ) {\\n                // Don't read into memory, just say we read it all\\n                // The result is ignored anyway\\n                v0_ = _args.a2;\\n            } else {\\n                v0_ = 0xFFffFFff;\\n                v1_ = EBADF;\\n            }\\n\\n            return (v0_, v1_, newPreimageOffset_, newMemRoot_);\\n        }\\n    }\\n\\n    /// @notice Like a Linux write syscall. Splits unaligned writes into aligned writes.\\n    /// @param _a0 The file descriptor.\\n    /// @param _a1 The memory address to read from.\\n    /// @param _a2 The number of bytes to read.\\n    /// @param _preimageKey The current preimaageKey.\\n    /// @param _preimageOffset The current preimageOffset.\\n    /// @param _proofOffset The offset of the memory proof in calldata.\\n    /// @param _memRoot The current memory root.\\n    /// @return v0_ The number of bytes written, or -1 on error.\\n    /// @return v1_ The error code, or 0 if empty.\\n    /// @return newPreimageKey_ The new preimageKey.\\n    /// @return newPreimageOffset_ The new preimageOffset.\\n    function handleSysWrite(\\n        uint32 _a0,\\n        uint32 _a1,\\n        uint32 _a2,\\n        bytes32 _preimageKey,\\n        uint32 _preimageOffset,\\n        uint256 _proofOffset,\\n        bytes32 _memRoot\\n    )\\n    internal\\n    pure\\n    returns (uint32 v0_, uint32 v1_, bytes32 newPreimageKey_, uint32 newPreimageOffset_)\\n    {\\n        unchecked {\\n        // args: _a0 = fd, _a1 = addr, _a2 = count\\n        // returns: v0_ = written, v1_ = err code\\n            v0_ = uint32(0);\\n            v1_ = uint32(0);\\n            newPreimageKey_ = _preimageKey;\\n            newPreimageOffset_ = _preimageOffset;\\n\\n            if (_a0 == FD_STDOUT || _a0 == FD_STDERR || _a0 == FD_HINT_WRITE) {\\n                v0_ = _a2; // tell program we have written everything\\n            }\\n                // pre-image oracle\\n            else if (_a0 == FD_PREIMAGE_WRITE) {\\n                // mask the addr to align it to 4 bytes\\n                uint32 mem = MIPSMemory.readMem(_memRoot, _a1 & 0xFFffFFfc, _proofOffset);\\n                bytes32 key = _preimageKey;\\n\\n                // Construct pre-image key from memory\\n                // We use assembly for more precise ops, and no var count limit\\n                assembly {\\n                    let alignment := and(_a1, 3) // the read might not start at an aligned address\\n                    let space := sub(4, alignment) // remaining space in memory word\\n                    if lt(space, _a2) {_a2 := space} // if less space than data, shorten data\\n                    key := shl(mul(_a2, 8), key) // shift key, make space for new info\\n                    let mask := sub(shl(mul(_a2, 8), 1), 1) // mask for extracting value from memory\\n                    mem := and(shr(mul(sub(space, _a2), 8), mem), mask) // align value to right, mask it\\n                    key := or(key, mem) // insert into key\\n                }\\n\\n                // Write pre-image key to oracle\\n                newPreimageKey_ = key;\\n                newPreimageOffset_ = 0; // reset offset, to read new pre-image data from the start\\n                v0_ = _a2;\\n            } else {\\n                v0_ = 0xFFffFFff;\\n                v1_ = EBADF;\\n            }\\n\\n            return (v0_, v1_, newPreimageKey_, newPreimageOffset_);\\n        }\\n    }\\n\\n    /// @notice Like Linux fcntl (file control) syscall, but only supports minimal file-descriptor control commands, to\\n    /// retrieve the file-descriptor R/W flags.\\n    /// @param _a0 The file descriptor.\\n    /// @param _a1 The control command.\\n    /// @param v0_ The file status flag (only supported command is F_GETFL), or -1 on error.\\n    /// @param v1_ An error number, or 0 if there is no error.\\n    function handleSysFcntl(uint32 _a0, uint32 _a1) internal pure returns (uint32 v0_, uint32 v1_) {\\n        unchecked {\\n            v0_ = uint32(0);\\n            v1_ = uint32(0);\\n\\n        // args: _a0 = fd, _a1 = cmd\\n            if (_a1 == 1) {\\n                // F_GETFD: get file descriptor flags\\n                if (\\n                    _a0 == FD_STDIN || _a0 == FD_STDOUT || _a0 == FD_STDERR || _a0 == FD_PREIMAGE_READ\\n                    || _a0 == FD_HINT_READ || _a0 == FD_PREIMAGE_WRITE || _a0 == FD_HINT_WRITE\\n                ) {\\n                    v0_ = 0; // No flags set\\n                } else {\\n                    v0_ = 0xFFffFFff;\\n                    v1_ = EBADF;\\n                }\\n            } else if (_a1 == 3) {\\n                // F_GETFL: get file descriptor flags\\n                if (_a0 == FD_STDIN || _a0 == FD_PREIMAGE_READ || _a0 == FD_HINT_READ) {\\n                    v0_ = 0; // O_RDONLY\\n                } else if (_a0 == FD_STDOUT || _a0 == FD_STDERR || _a0 == FD_PREIMAGE_WRITE || _a0 == FD_HINT_WRITE) {\\n                    v0_ = 1; // O_WRONLY\\n                } else {\\n                    v0_ = 0xFFffFFff;\\n                    v1_ = EBADF;\\n                }\\n            } else {\\n                v0_ = 0xFFffFFff;\\n                v1_ = EINVAL; // cmd not recognized by this kernel\\n            }\\n\\n            return (v0_, v1_);\\n        }\\n    }\\n\\n    function handleSyscallUpdates(\\n        st.CpuScalars memory _cpu,\\n        uint32[32] memory _registers,\\n        uint32 _v0,\\n        uint32 _v1\\n    )\\n    internal\\n    pure\\n    {\\n        unchecked {\\n        // Write the results back to the state registers\\n            _registers[2] = _v0;\\n            _registers[7] = _v1;\\n\\n        // Update the PC and nextPC\\n            _cpu.pc = _cpu.nextPC;\\n            _cpu.nextPC = _cpu.nextPC + 4;\\n        }\\n    }\\n}\\n\",\"keccak256\":\"0x096e7b87990bb71ed74cb44b8b164905645aca3797381198126f895a479fc2b9\",\"license\":\"MIT\"},\"contracts/universal/ISemver.sol\":{\"content\":\"// SPDX-License-Identifier: MIT\\npragma solidity ^0.8.0;\\n\\n/// @title ISemver\\n/// @notice ISemver is a simple contract for ensuring that contracts are\\n///         versioned using semantic versioning.\\ninterface ISemver {\\n    /// @notice Getter for the semantic version of the contract. This is not\\n    ///         meant to be used onchain but instead meant to be used by offchain\\n    ///         tooling.\\n    /// @return Semver contract version as a string.\\n    function version() external view returns (string memory);\\n}\\n\",\"keccak256\":\"0xba34562a8026f59886d2e07d1d58d90b9691d00e0788c6263cef6c22740cab44\",\"license\":\"MIT\"}},\"version\":1}",
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  "devdoc": {
    "details": "https://inst.eecs.berkeley.edu/~cs61c/resources/MIPS_Green_Sheet.pdfhttps://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf      (page A-177)https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdfhttps://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formatshttps://github.com/golang/go/blob/master/src/syscall/zerrors_linux_mips.go      MIPS linux kernel errors used by Go runtime",
    "kind": "dev",
    "methods": {
      "constructor": {
        "params": {
          "_oracle": "The address of the preimage oracle contract."
        }
      },
      "oracle()": {
        "returns": {
          "oracle_": "The IPreimageOracle contract."
        }
      },
      "step(bytes,bytes,bytes32)": {
        "params": {
          "_localContext": "The local key context for the preimage oracle. Optional, can be set as a constant                      if the caller only requires one set of local keys.",
          "_proof": "The encoded proof data for leaves within the MIPS VM's memory.",
          "_stateData": "The encoded state witness data."
        }
      }
    },
    "stateVariables": {
      "version": {
        "custom:semver": "1.1.0-rc.1"
      }
    },
    "title": "MIPS",
    "version": 1
  },
  "userdoc": {
    "kind": "user",
    "methods": {
      "oracle()": {
        "notice": "Getter for the pre-image oracle contract."
      },
      "step(bytes,bytes,bytes32)": {
        "notice": "Executes a single step of the vm.         Will revert if any required input state is missing."
      },
      "version()": {
        "notice": "The semantic version of the MIPS contract."
      }
    },
    "notice": "The MIPS contract emulates a single MIPS instruction.         Note that delay slots are isolated instructions:         the nextPC in the state pre-schedules where the VM jumps next.         The Step input is a packed VM state, with binary-merkle-tree         witness data for memory reads/writes.         The Step outputs a keccak256 hash of the packed VM State,         and logs the resulting state for offchain usage.",
    "version": 1
  },
  "storageLayout": {
    "storage": [],
    "types": null
  }
}