export interface RiscVInstruction {
    readonly opcode: number;
    readonly name: string;
    readonly exec: (cpu: RiscVCpu) => void;
}
export declare class RiscVCpu {
    /** General-purpose registers (32 x 32-bit) */
    readonly Registers: Uint32Array;
    /** Program counter */
    PC: number;
    /** Program memory */
    readonly Program: Uint8Array;
    /** Stack memory */
    readonly Stack: Uint32Array;
    /** Instruction cache */
    private instructionCache;
    /** Flag: Zero */
    ZF: boolean;
    /** Flag: Sign */
    SF: boolean;
    /** Flag: Carry */
    CF: boolean;
    /** Flag: Overflow */
    OF: boolean;
    static readonly StackSize = 1024;
    static readonly RegisterCount = 32;
    constructor(memory: ArrayBuffer | Uint8Array | number, registers?: number | Uint32Array, pc?: number);
    /**
     * Read from program memory
     * @param size Number of bytes to read (1, 2, 4)
     * @returns Value read from memory
     */
    read(size: number): number;
    /**
     * Push value onto stack
     */
    push(value: number): void;
    /**
     * Pop value from stack
     */
    pop(): number;
    /**
     * Factory method to create a new RISC-V CPU
     */
    static new(memory: number | Uint8Array | ArrayBuffer, registers?: number | Uint32Array, pc?: number): RiscVCpu;
    /**
     * Execute program until PC reaches -1 or end of program
     */
    run(): void;
}
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