import BusInterface from '../bus/BusInterface';
import CpuInterface from './CpuInterface';
import RngInterface from '../../tools/rng/GeneratorInterface';
export declare function opBoot(state: CpuInterface.State, bus: BusInterface): void;
export declare function opIrq(state: CpuInterface.State, bus: BusInterface): void;
export declare function opNmi(state: CpuInterface.State, bus: BusInterface): void;
declare class BatchedAccessCpu {
    private _bus;
    private _rng?;
    constructor(_bus: BusInterface, _rng?: RngInterface);
    setInterrupt(irq: boolean): BatchedAccessCpu;
    isInterrupt(): boolean;
    nmi(): BatchedAccessCpu;
    halt(): BatchedAccessCpu;
    resume(): BatchedAccessCpu;
    isHalt(): boolean;
    setInvalidInstructionCallback(callback: CpuInterface.InvalidInstructionCallbackInterface): BatchedAccessCpu;
    getInvalidInstructionCallback(): CpuInterface.InvalidInstructionCallbackInterface;
    getLastInstructionPointer(): number;
    reset(): BatchedAccessCpu;
    cycle(): BatchedAccessCpu;
    private _fetch;
    private _checkForInterrupts;
    executionState: CpuInterface.ExecutionState;
    state: CpuInterface.State;
    private _opCycles;
    private _instructionCallback;
    private _invalidInstructionCallback;
    private _interruptPending;
    private _nmiPending;
    private _interuptCheck;
    private _halted;
    private _operand;
    private _lastInstructionPointer;
    private _currentAddressingMode;
    private _dereference;
}
export { BatchedAccessCpu as default };